From: Cesar Strauss <cestrauss@gmail.com>
Date: Tue, 7 Sep 2021 19:11:15 +0000 (-0300)
Subject: Fix typo.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=cdd1bf6713a667fb81b0b2ada84d53d99509778c;p=soc.git

Fix typo.
---

diff --git a/src/soc/simple/test/test_core.py b/src/soc/simple/test/test_core.py
index e0139942..0b0f3a36 100644
--- a/src/soc/simple/test/test_core.py
+++ b/src/soc/simple/test/test_core.py
@@ -161,7 +161,7 @@ def check_regs(dut, sim, core, test, code):
     print("core int regs", list(map(hex, intregs)))
 
     # TODO, split this out into "sim-register-getter" function
-    intregs = []
+    simregs = []
     for i in range(32):
         simregs.append(sim.gpr[i].asint())
     print("sim int regs", list(map(hex, simregs)))