From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Fri, 1 Jul 2022 15:16:25 +0000 (+0100)
Subject: clarify
X-Git-Tag: opf_rfc_ls005_v1~1418
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=d2647ac80af02618c24134bf130aad6ddbc159f5;p=libreriscv.git

clarify
---

diff --git a/openpower/sv/overview.mdwn b/openpower/sv/overview.mdwn
index 804d7042a..f44ae726a 100644
--- a/openpower/sv/overview.mdwn
+++ b/openpower/sv/overview.mdwn
@@ -737,7 +737,7 @@ those:
            sm = id*SUBVL + (remap-4)
            ireg[rd+s] <= ireg[RA+sm]
 
-Note that a value of 6 (and 7) will leave the target subvector element
+Note that a value of 0b000 will leave the target subvector element
 untouched. This is equivalent to a predicate mask which is built-in,
 in immediate form, into the [[sv/mv.swizzle]] operation.  mv.swizzle is
 rare in that it is one of the few instructions needed to be added that