From: Joshua Harlan Lifton Date: Fri, 8 Feb 2019 03:56:39 +0000 (-0800) Subject: Correct spelling X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=e5588ec8b824f7b416a1440a14594d44e327f46d;p=crowdsupply.git Correct spelling --- diff --git a/updates/005_2018dec14_simd_without_simd.mdwn b/updates/005_2018dec14_simd_without_simd.mdwn index b33158f..2b15041 100644 --- a/updates/005_2018dec14_simd_without_simd.mdwn +++ b/updates/005_2018dec14_simd_without_simd.mdwn @@ -2,14 +2,14 @@ Spread over various [videos](https://youtu.be/DoZrGJIltgU), [writings](https://groups.google.com/forum/#!topic/comp.arch/2kYGFU4ppow), and [mailing list discussions](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2018-December/000261.html), -a picture is beginning to emerge of a suibable microarchitecture. +a picture is beginning to emerge of a suitable microarchitecture. There are several things to remember about this design, the primary being that it is not explicitly intended as a discrete GPU (although one could be made). Instead, it is primarily for a battery-operated, power-efficient hand-held device, where it happens to just about pass -on, say, a low to mid-range chromebook. Power consumption *for the -entire chip* is targetted at 2.5 watts. +on, say, a low to mid-range Chromebook. Power consumption *for the +entire chip* is targeted at 2.5 watts. We learned quite quickly that, paradoxically, even a mobile embedded 3D GPU *requires* extreme an number of registers (128 floating-point @@ -26,7 +26,7 @@ Dealing with 128 registers brings some unique challenges not normally faced by general purpose CPUs, and when it becomes possible (or a requirement) to access even down to the byte level of those 64-bit registers as "elements" in a vector operation, it is even more -challenging. Recall Mitch Alsup's scoreboard dependency floorplan +challenging. Recall Mitch Alsup's scoreboard dependency floor plan (reproduced with kind permission, here): {mitch-ld-st-augmentation | link}