From: Andrew Waterman Date: Tue, 21 Aug 2018 02:10:05 +0000 (-0700) Subject: Revert "Fix to solve the failing tests shamt, csr and scall (#151)" X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=eebc9c3dd9c96c461ff3304b1cdfb1f2a0f35b41;p=riscv-tests.git Revert "Fix to solve the failing tests shamt, csr and scall (#151)" This reverts commit 31a91823b7c7becacd06c9c32e44180eea5e4fe7. These changes should be made to the test environment, not the tests themselves. --- diff --git a/isa/rv64si/csr.S b/isa/rv64si/csr.S index e3ea0cd..dbe1c05 100644 --- a/isa/rv64si/csr.S +++ b/isa/rv64si/csr.S @@ -80,20 +80,6 @@ RVTEST_CODE_BEGIN srli a0, a0, 20 # a0 = a0 >> 20 andi a0, a0, 1 # a0 = a0 & 1 beqz a0, finish # if no user mode, skip the rest of these checks - la t0, user_mode_end - srli t0, t0, PMP_SHIFT - csrr t1, pmpcfg0 - csrw pmpaddr0, t0 - csrr t1, pmpaddr0 - bne t0, t1, fail - li t0, (PMP_R | PMP_W | PMP_X) # giving read, write and execute permissions - or t0, t0, PMP_TOR # setting mode to TOR - li t1, 255 - csrrc t1, pmpcfg0, t1 - csrrs t1, pmpcfg0, t0 - csrr t1, pmpcfg0 - andi t1, t1, 255 - bne t0, t1, fail #endif /* __MACHINE_MODE */ # jump to user land @@ -117,15 +103,10 @@ RVTEST_CODE_BEGIN #else TEST_CASE(12, x0, 0, nop) #endif - scall + finish: RVTEST_PASS - .align 2 - .global user_mode_end -user_mode_end: - nop - # We should only fall through to this if scall failed. TEST_PASSFAIL diff --git a/isa/rv64si/scall.S b/isa/rv64si/scall.S index aea49b0..0579806 100644 --- a/isa/rv64si/scall.S +++ b/isa/rv64si/scall.S @@ -6,8 +6,6 @@ # # Test syscall trap. # -# If the pmp registers are implemented, then the pmp registers have -# to be configured before jumping to the privilaged modes #include "riscv_test.h" #include "test_macros.h" @@ -28,33 +26,16 @@ RVTEST_CODE_BEGIN li TESTNUM, 2 + # This is the expected trap code. + li t1, CAUSE_USER_ECALL + #ifdef __MACHINE_MODE # If running in M mode, use mstatus.MPP to check existence of U mode. # Otherwise, if in S mode, then U mode must exist and we don't need to check. - - la t0, user_mode_end - srli t0, t0, PMP_SHIFT - csrr t1, pmpcfg0 - csrw pmpaddr0, t0 - csrr t1, pmpaddr0 - bne t0, t1, fail - li t0, (PMP_R | PMP_W | PMP_X) # giving read, write and execute permissions - or t0, t0, PMP_TOR # setting mode to TOR - li t1, 255 - csrrc t1, pmpcfg0, t1 - csrrs t1, pmpcfg0, t0 - csrr t1, pmpcfg0 - andi t1, t1, 255 - bne t0, t1, fail -.global no_pmp_implemented -no_pmp_implemented: li t0, MSTATUS_MPP csrc mstatus, t0 csrr t1, mstatus and t0, t0, t1 - -# This is the expected trap code. - li t1, CAUSE_USER_ECALL beqz t0, 1f # If U mode doesn't exist, mcause should indicate ECALL from M mode. @@ -74,27 +55,18 @@ do_scall: scall j fail - .align 2 - .global user_mode_end -user_mode_end: - nop - TEST_PASSFAIL .align 2 .global stvec_handler stvec_handler: csrr t0, scause - bne t0, t1, check_for_pmp + bne t0, t1, fail la t2, do_scall csrr t0, sepc bne t0, t2, fail j pass -check_for_pmp: - li t1, CAUSE_ILLEGAL_INSTRUCTION - bne t0, t1, fail - j no_pmp_implemented RVTEST_CODE_END .data