From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Tue, 10 Jul 2018 04:45:23 +0000 (+0100)
Subject: whitespace pep8 cleanup
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f4c61ad1224b12e76e20b899b4a9a02034355ce5;p=pinmux.git

whitespace pep8 cleanup
---

diff --git a/src/bsv/interface_decl.py b/src/bsv/interface_decl.py
index 5493d16..84eb2f0 100644
--- a/src/bsv/interface_decl.py
+++ b/src/bsv/interface_decl.py
@@ -9,6 +9,7 @@ from bsv.wire_def import generic_io  # special case
 from bsv.wire_def import muxwire  # special case
 from ifacebase import InterfacesBase
 
+
 class Pin(object):
     """ pin interface declaration.
         * name is the name of the pin
@@ -312,9 +313,9 @@ class Interfaces(InterfacesBase):
 
 # ========= Interface declarations ================ #
 
-mux_interface = MuxInterface('cell', [{'name': 'mux', 'ready': False,
-                                       'enabled': False,
-                                       'bitspec': '{1}', 'action': True}])
+mux_interface = MuxInterface('cell',
+                             [{'name': 'mux', 'ready': False, 'enabled': False,
+                               'bitspec': '{1}', 'action': True}])
 
 io_interface = IOInterface(
     'io',
diff --git a/src/ifacebase.py b/src/ifacebase.py
index 2fb834c..c5487a1 100644
--- a/src/ifacebase.py
+++ b/src/ifacebase.py
@@ -78,4 +78,3 @@ class InterfacesBase(UserDict):
                         ganged[bus].append(name)
                 spec.append(d)
         return spec, ganged
-
diff --git a/src/myhdl/pinmux_generator.py b/src/myhdl/pinmux_generator.py
index 0dfdef5..8e99519 100644
--- a/src/myhdl/pinmux_generator.py
+++ b/src/myhdl/pinmux_generator.py
@@ -8,6 +8,8 @@ except ImportError:
 digits = maketrans('0123456789', ' ' * 10)  # delete space later
 
 # XXX hmmm duplicated from src/bsc/actual_pinmux.py
+
+
 def transfn(temp):
     """ removes the number from the string of signal name.
     """
@@ -103,7 +105,6 @@ class Interface(object):
         return '%s{0}_%s' % (self.ifacename, name)
 
 
-
 class Interfaces(InterfacesBase):
     """ contains a list of interface definitions
     """
diff --git a/src/myhdl/pins.py b/src/myhdl/pins.py
index b8b6b78..24ddd1e 100644
--- a/src/myhdl/pins.py
+++ b/src/myhdl/pins.py
@@ -226,6 +226,7 @@ def test_mux():
     tb.config_sim(trace=True)
     tb.run_sim(66 * period)  # run for 15 clock cycle
 
+
 test = create_test()
 
 
diff --git a/src/parse.py b/src/parse.py
index 9c45944..3d508d6 100644
--- a/src/parse.py
+++ b/src/parse.py
@@ -110,7 +110,6 @@ class Parse(object):
         return int(math.log(max_num_cells + 1, 2))
 
 
-
 if __name__ == '__main__':
     p = Parse()
     print (p.N_IO)
diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py
index 6dcc20d..42a9381 100644
--- a/src/pinmux_generator.py
+++ b/src/pinmux_generator.py
@@ -95,7 +95,7 @@ if __name__ == '__main__':
             else:
                 specgen(of, output_dir, pinout, bankspec, pinspec, fixedpins)
     else:
-        gentypes = {'bsv': bsvgen, 'myhdl': myhdlgen }
+        gentypes = {'bsv': bsvgen, 'myhdl': myhdlgen}
         if output_type not in gentypes:
             print ("ERROR: output type '%s' does not exist" % output_type)
             printhelp()