From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 22 Jul 2019 16:19:37 +0000 (+0100)
Subject: random modifications
X-Git-Tag: ls180-24jan2020~766
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f742ff35b0434224adae1270b0a1e66109f7eea4;p=ieee754fpu.git

random modifications
---

diff --git a/src/ieee754/fpcommon/test/fpmux.py b/src/ieee754/fpcommon/test/fpmux.py
index 5228ed6b..24bc7824 100644
--- a/src/ieee754/fpcommon/test/fpmux.py
+++ b/src/ieee754/fpcommon/test/fpmux.py
@@ -168,9 +168,9 @@ def create_random(num_rows, width, single_op=False, n_vals=10):
                 op1 = randint(0, (1<<width)-1)
                 op2 = randint(0, (1<<width)-1)
 
-                op2 = 0x4100
-                op1 = 0x4000
-                #op2 = 0x3c00
+                op2 = 0x4000
+                op1 = 0x3c00
+                op2 = 0x3e00
                 vals.append((op1, op2,))
     return vals
 
diff --git a/src/ieee754/fpdiv/div2.py b/src/ieee754/fpdiv/div2.py
index 83b1e4f4..ddc6f905 100644
--- a/src/ieee754/fpdiv/div2.py
+++ b/src/ieee754/fpdiv/div2.py
@@ -66,7 +66,7 @@ class FPDivStage2Mod(FPState, Elaboratable):
             pl = len(self.i.quotient_root) + len(self.i.remainder)
             pt = Signal(pl, reset_less=True)
             m.d.comb += pt.eq(Cat(self.i.remainder, self.i.quotient_root))
-            p = Signal(pl, reset_less=True)
+            p = Signal(pl-1, reset_less=True) # drop top bit
             with m.If(self.i.quotient_root[-1]):
                 m.d.comb += p.eq(pt)
             with m.Else():
@@ -78,11 +78,11 @@ class FPDivStage2Mod(FPState, Elaboratable):
             # XXX what to do about remainder? shift that as well?
             # hmm, how about concatenate remainder and quotient...
             m.d.comb += [
-                self.o.z.m.eq(p[-mw-2:]),
-                self.o.of.m0.eq(p[-mw-2]), # copy of LSB
+                self.o.z.m.eq(p[-mw:]),
+                self.o.of.m0.eq(p[-mw]), # copy of LSB
                 self.o.of.guard.eq(p[-mw-1]),
-                self.o.of.round_bit.eq(p[-mw]),
-                self.o.of.sticky.eq(p[:-mw].bool())
+                self.o.of.round_bit.eq(p[-mw-2]),
+                self.o.of.sticky.eq(p[:-mw-2].bool())
             ]
 
         m.d.comb += self.o.out_do_z.eq(self.i.out_do_z)