From: Andrew Waterman Date: Fri, 10 Nov 2017 02:46:27 +0000 (-0800) Subject: H-mode no longer exists X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=f87cdfec1dd79afdabccc848e730d780589b8a65;p=riscv-isa-sim.git H-mode no longer exists It's supplanted by the hypervisor extension, which doesn't use the privilege encoding of 2; it still looks like supervisor (i.e. 1). --- diff --git a/riscv/processor.cc b/riscv/processor.cc index ebae384..f177090 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -242,7 +242,6 @@ void processor_t::take_trap(trap_t& t, reg_t epc) if (t.cause() == CAUSE_BREAKPOINT && ( (state.prv == PRV_M && state.dcsr.ebreakm) || - (state.prv == PRV_H && state.dcsr.ebreakh) || (state.prv == PRV_S && state.dcsr.ebreaks) || (state.prv == PRV_U && state.dcsr.ebreaku))) { enter_debug_mode(DCSR_CAUSE_SWBP); diff --git a/riscv/processor.h b/riscv/processor.h index 16416a4..87cb6a4 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -222,7 +222,6 @@ public: (operation == OPERATION_STORE && !state.mcontrol[i].store) || (operation == OPERATION_LOAD && !state.mcontrol[i].load) || (state.prv == PRV_M && !state.mcontrol[i].m) || - (state.prv == PRV_H && !state.mcontrol[i].h) || (state.prv == PRV_S && !state.mcontrol[i].s) || (state.prv == PRV_U && !state.mcontrol[i].u)) { continue;