bug 1236: add extra argument to svstep: RA.
[openpower-isa.git] / src / openpower / decoder / isa / test_caller_svp64_chacha20.py
2024-01-30 Luke Kenneth Casso... bug 1236: add extra argument to svstep: RA.
2023-09-17 Luke Kenneth Casso... add code-comments to chacha20 svp64 unit test
2023-09-16 Luke Kenneth Casso... add links copyright and funding notice to svp64 chacha2...
2023-06-02 Dmitry Selyutinpysvp64asm: integrate into insndb
2023-03-25 Luke Kenneth Casso... updated simplev setvl specification pseudocode: MAJOR...
2023-03-25 Luke Kenneth Casso... whitespace
2023-03-12 Luke Kenneth Casso... set MAXVL=VL=32 first, then set vertical-first separately
2023-03-12 Konstantinos Marga... used same input data as the actual C test
2023-03-12 Luke Kenneth Casso... change target registers in test_caller_svp64_chacha20...
2023-03-12 Luke Kenneth Casso... whoops use same temp reg for ctr
2023-03-12 Luke Kenneth Casso... parameterise svstep RT (set to 16 in chacha20 test)
2023-03-12 Luke Kenneth Casso... parameterising VL and SHAPE0-2 in chacha20 test
2023-03-12 Luke Kenneth Casso... parameterise the target block in chacha20 test,
2023-03-12 Luke Kenneth Casso... add print-out for chacha20 schedule
2022-10-23 Luke Kenneth Casso... use svshape2 instead of svindex for the 4th shape
2022-10-22 Jacob Lifshayformat code removing unused imports
2022-10-21 Luke Kenneth Casso... code-comments
2022-10-21 Luke Kenneth Casso... add 2nd outer loop, CTR 2 rounds, in chacha20 test
2022-10-21 Luke Kenneth Casso... move chacha20 to separate test, set/get masked regs...