From 06062a1b5c4be28aed370ab5afef79f883acd916 Mon Sep 17 00:00:00 2001 From: Andrew Waterman Date: Tue, 12 Apr 2011 01:42:20 -0700 Subject: [PATCH] [sim,pk] fixed minor pk bugs and trap codes --- riscv/mmu.h | 8 +++++--- riscv/trap.h | 3 ++- 2 files changed, 7 insertions(+), 4 deletions(-) diff --git a/riscv/mmu.h b/riscv/mmu.h index c61eb80..f7bd8ce 100644 --- a/riscv/mmu.h +++ b/riscv/mmu.h @@ -52,14 +52,16 @@ private: size_t memsz; reg_t badvaddr; - void check_align(reg_t addr, int size, bool fetch) + void check_align(reg_t addr, int size, bool store, bool fetch) { if(addr & (size-1)) { badvaddr = addr; if(fetch) throw trap_instruction_address_misaligned; - throw trap_data_address_misaligned; + if(store) + throw trap_store_address_misaligned; + throw trap_load_address_misaligned; } } @@ -76,7 +78,7 @@ private: void check_align_and_bounds(reg_t addr, int size, bool store, bool fetch) { - check_align(addr, size, fetch); + check_align(addr, size, store, fetch); check_bounds(addr, size, store, fetch); } }; diff --git a/riscv/trap.h b/riscv/trap.h index 8424d80..698852c 100644 --- a/riscv/trap.h +++ b/riscv/trap.h @@ -10,7 +10,8 @@ DECLARE_TRAP(interrupt), \ DECLARE_TRAP(syscall), \ DECLARE_TRAP(breakpoint), \ - DECLARE_TRAP(data_address_misaligned), \ + DECLARE_TRAP(load_address_misaligned), \ + DECLARE_TRAP(store_address_misaligned), \ DECLARE_TRAP(load_access_fault), \ DECLARE_TRAP(store_access_fault), \ DECLARE_TRAP(vector_disabled), \ -- 2.30.2