From 07032cdcf10d72a421a38086d784f087e3f9ee01 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 20 Jul 2018 05:52:25 +0100 Subject: [PATCH] add slow peripheral generation, fix python3, and whitespace yes i know, not supposed to do multi-purpose commit.... --- src/bsv/bsv_lib/slow_peripherals_template.bsv | 17 ++++------- src/bsv/interface_decl.py | 30 +++++++++++++++++++ src/bsv/peripheral_gen.py | 24 +++++++-------- src/bsv/pinmux_generator.py | 30 ++++++++++++++----- src/myhdlgen/pinmux_generator.py | 8 ++--- src/pinmux_generator.py | 13 ++++---- 6 files changed, 82 insertions(+), 40 deletions(-) diff --git a/src/bsv/bsv_lib/slow_peripherals_template.bsv b/src/bsv/bsv_lib/slow_peripherals_template.bsv index 2970c3c..7fbf58b 100644 --- a/src/bsv/bsv_lib/slow_peripherals_template.bsv +++ b/src/bsv/bsv_lib/slow_peripherals_template.bsv @@ -19,12 +19,15 @@ package slow_peripherals; /*=======================*/ /*===== Import the slow peripherals ====*/ {0} + `ifdef CLINT + import clint::*; + `endif + `ifdef PLIC + import plic ::*; + `endif `ifdef AXIEXP import axiexpansion ::*; `endif - import pinmux::*; - import mux::*; - import gpio::*; /*=====================================*/ /*===== interface declaration =====*/ @@ -45,15 +48,7 @@ package slow_peripherals; method Bit#(`Reg_width) mtime; `endif `ifdef PLIC method ActionValue#(Tuple2#(Bool,Bool)) intrpt_note; `endif - `ifdef I2C0 method Bit#(1) i2c0_isint; `endif - `ifdef I2C1 method Bit#(1) i2c1_isint; `endif - `ifdef QSPI0 method Bit#(1) qspi0_isint; `endif - `ifdef QSPI1 method Bit#(1) qspi1_isint; `endif - `ifdef UART0 method Bit#(1) uart0_intr; `endif - // NEEL EDIT interface IOCellSide iocell_side; // mandatory interface - interface GPIO_config#(3) pad_configa; // depends on the number of banks - // NEEL EDIT OVER endinterface /*================================*/ diff --git a/src/bsv/interface_decl.py b/src/bsv/interface_decl.py index 52e1ade..7df7a43 100644 --- a/src/bsv/interface_decl.py +++ b/src/bsv/interface_decl.py @@ -8,6 +8,8 @@ except ImportError: from bsv.wire_def import generic_io # special case from bsv.wire_def import muxwire # special case from ifacebase import InterfacesBase +from bsv.peripheral_gen import PFactory +slowfactory = PFactory() class Pin(object): @@ -121,6 +123,11 @@ class Interface(object): self.pins = [] # a list of instances of class Pin self.pinspecs = pinspecs # a list of dictionary self.single = single + self.slow = None + slow = slowfactory.getcls(ifacename) + if slow: + self.slow = slow() + for p in pinspecs: _p = {} _p.update(p) @@ -251,6 +258,16 @@ class Interface(object): res = res.format(*args) return '\n' + res + '\n' + def slowimport(self): + if not self.slow: + return '' + return self.slow.importfn().format() + + def slowifdecl(self, count): + if not self.slow: + return '' + return self.slow.ifacedecl().format(count, self.ifacename) + class MuxInterface(Interface): @@ -312,6 +329,19 @@ class Interfaces(InterfacesBase): f.write(c.format(i)) f.write(self.data[name].wirefmt(i)) + def slowimport(self, *args): + ret = [] + for (name, count) in self.ifacecount: + ret.append(self.data[name].slowimport()) + return '\n'.join(list(filter(None, ret))) + + def slowifdecl(self, *args): + ret = [] + for (name, count) in self.ifacecount: + for i in range(count): + ret.append(self.data[name].slowifdecl(i)) + return '\n'.join(list(filter(None, ret))) + # ========= Interface declarations ================ # diff --git a/src/bsv/peripheral_gen.py b/src/bsv/peripheral_gen.py index a97697e..41d9240 100644 --- a/src/bsv/peripheral_gen.py +++ b/src/bsv/peripheral_gen.py @@ -1,12 +1,13 @@ class PBase(object): pass + class uart(PBase): def importfn(self): return " import Uart16550 :: *;" def ifacedecl(self): - return " interface RS232_PHY_Ifc uart{0}_coe;" \ + return " interface RS232_PHY_Ifc uart{0}_coe;\n" \ " method Bit#(1) uart{0}_intr;" @@ -24,7 +25,7 @@ class twi(PBase): return " import I2C_top :: *;" def ifacedecl(self): - return " interface I2C_out i2c{0}_out;" \ + return " interface I2C_out i2c{0}_out;\n" \ " method Bit#(1) i2c{0}_isint;" @@ -33,7 +34,7 @@ class qspi(PBase): return " import qspi :: *;" def ifacedecl(self): - return " interface QSPI_out qspi{0}_out;" \ + return " interface QSPI_out qspi{0}_out;\n" \ " method Bit#(1) qspi{0}_isint;" @@ -47,21 +48,20 @@ class pwm(PBase): class gpio(PBase): def importfn(self): - return " import pinmux::*;" \ - " import mux::*;" \ - " import gpio::*;" + return " import pinmux::*;\n" \ + " import mux::*;\n" \ + " import gpio::*;\n" def ifacedecl(self): return " interface GPIO_config#({1}) pad_config{0};" - class PFactory(object): - def __init__(self): + def getcls(self, name): return {'uart': uart, 'rs232': rs232, 'twi': twi, - 'qspi', qspi, - 'pwm', pwm, - 'gpio', 'gpio' - } + 'qspi': qspi, + 'pwm': pwm, + 'gpio': gpio + }.get(name, None) diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py index a90d905..7d33d6f 100644 --- a/src/bsv/pinmux_generator.py +++ b/src/bsv/pinmux_generator.py @@ -72,8 +72,8 @@ def pinmuxgen(pth=None, verify=True): shutil.copyfile(os.path.join(cwd, 'Makefile.template'), os.path.join(bp, 'Makefile')) cwd = os.path.join(cwd, 'bsv_lib') - for fname in ['AXI4_Lite_Types.bsv', 'Semi_FIFOF.bsv', - 'gpio.bsv', 'mux.bsv']: + for fname in ['AXI4_Lite_Types.bsv', 'Semi_FIFOF.bsv', + 'gpio.bsv', 'mux.bsv']: shutil.copyfile(os.path.join(cwd, fname), os.path.join(bl, fname)) @@ -82,12 +82,27 @@ def pinmuxgen(pth=None, verify=True): ptp = os.path.join(bp, 'PinTop.bsv') bvp = os.path.join(bp, 'bus.bsv') idef = os.path.join(bp, 'instance_defines.bsv') + slow = os.path.join(bp, 'slow_peripherals.bsv') + slowt = os.path.join(cwd, 'slow_peripherals_template.bsv') write_pmp(pmp, p, ifaces, iocells) write_ptp(ptp, p, ifaces) write_bvp(bvp, p, ifaces) write_bus(bus, p, ifaces) write_instances(idef, p, ifaces) + write_slow(slow, slowt, p, ifaces) + + +def write_slow(slow, template, p, ifaces): + """ write out the slow_peripherals.bsv file. + joins all the peripherals together into one AXI Lite interface + """ + with open(template) as bsv_file: + template = bsv_file.read() + imports = ifaces.slowimport() + ifdecl = ifaces.slowifdecl() + with open(slow, "w") as bsv_file: + bsv_file.write(template.format(imports, ifdecl)) def write_bus(bus, p, ifaces): @@ -339,16 +354,17 @@ def write_bvp(bvp, p, ifaces): decl.append(muxdec .format(npins, bank)) idec.append(gpioifc.format(bank)) idec.append(muxifc.format(bank)) - print dir(ifaces) - print ifaces.items() - print dir(ifaces['gpioa']) - print ifaces['gpioa'].pinspecs + print (dir(ifaces)) + print (ifaces.items()) + print (dir(ifaces['gpioa'])) + print (ifaces['gpioa'].pinspecs) gpiodecl = '\n'.join(decl) + '\n' + '\n'.join(idec) gpiocfg = '\n'.join(cfg) bsv_file.write(axi4_lite.format(gpiodecl, gpiocfg)) # ################################################## -def write_instances(idef, p, ifaces): + +def write_instances(idef, p, ifaces): with open(idef, 'w') as bsv_file: txt = '''\ `define ADDR {0} diff --git a/src/myhdlgen/pinmux_generator.py b/src/myhdlgen/pinmux_generator.py index ddc6df2..b157459 100644 --- a/src/myhdlgen/pinmux_generator.py +++ b/src/myhdlgen/pinmux_generator.py @@ -98,11 +98,11 @@ class MyHdlIface(object): def __init__(self, iface): self.pnames = [] for p in iface.pins: - print "typ", p.typ, p.name + print ("typ", p.typ, p.name) io = IO(p.typ, p.name) setattr(self, p.name, io) self.pnames.append(p.name) - print dir(self) + print (dir(self)) def create_module(p, ifaces): @@ -124,12 +124,12 @@ def pinmux(muxfn, clk, p, ifaces, {0}): p.muxers.append(pin) m = Mux(p.cell_bitwidth) p.muxsel.append(m) - print args + print (args) p.myhdlifaces = [] for k, count in ifaces.ifacecount: i = ifaces[k] for c in range(count): - print k + print (k) args.append("%s%d" % (k, c)) p.myhdlifaces.append(MyHdlIface(ifaces[k])) diff --git a/src/pinmux_generator.py b/src/pinmux_generator.py index 3da90f1..b8afe99 100644 --- a/src/pinmux_generator.py +++ b/src/pinmux_generator.py @@ -21,9 +21,6 @@ import os.path import sys from spec import modules, specgen, dummytest -from bsv.pinmux_generator import pinmuxgen as bsvgen -from myhdlgen.pinmux_generator import pinmuxgen as myhdlgen - def printhelp(): print ('''pinmux_generator.py [-o outputdir] [-v|--validate] [-h|--help] @@ -95,9 +92,13 @@ if __name__ == '__main__': else: specgen(of, output_dir, pinout, bankspec, pinspec, fixedpins) else: - gentypes = {'bsv': bsvgen, 'myhdl': myhdlgen} - if output_type not in gentypes: + if output_type == 'bsv': + from bsv.pinmux_generator import pinmuxgen as gentypes + elif output_type == 'myhdl': + from myhdlgen.pinmux_generator import pinmuxgen as gentypes + else: print ("ERROR: output type '%s' does not exist" % output_type) printhelp() sys.exit(0) - gentypes[output_type](output_dir, validate) + + gentypes(output_dir, validate) -- 2.30.2