From 0ea6986c101b88be377c68969a5757076d2c1e40 Mon Sep 17 00:00:00 2001 From: Tobias Platen Date: Wed, 10 Nov 2021 19:20:06 +0100 Subject: [PATCH] add debug output for msr_pr --- src/soc/experiment/compldst_multi.py | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/experiment/compldst_multi.py b/src/soc/experiment/compldst_multi.py index 29c07adb..61f0d3cf 100644 --- a/src/soc/experiment/compldst_multi.py +++ b/src/soc/experiment/compldst_multi.py @@ -540,6 +540,7 @@ class LDSTCompUnit(RegSpecAPI, Elaboratable): comb += addr_ok.eq(self.pi.addr_ok_o) # no exc, address fine # connect MSR.PR for priv/virt operation comb += pi.msr_pr.eq(oper_r.msr[MSR.PR]) + comb += Display("MMUTEST: pi.msr_pr=%i",oper_r.msr[MSR.PR]) # byte-reverse on LD revnorev = Signal(64, reset_less=True) -- 2.30.2