From 101740190d4512e6fc9c17a78757113c18712f4e Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 15 Jun 2018 14:30:29 +0100 Subject: [PATCH] update --- pinmux/pinmux_chennai_2018.tex | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/pinmux/pinmux_chennai_2018.tex b/pinmux/pinmux_chennai_2018.tex index 0175cbd88..37826be6a 100644 --- a/pinmux/pinmux_chennai_2018.tex +++ b/pinmux/pinmux_chennai_2018.tex @@ -43,8 +43,11 @@ \item Input Priority Muxer: a multiplexer that has N selector wires and N inputs, where the lowest (or highest) indexed "selector" that is enabled results in its corresponding - input being routed to the output.\vspace{10pt} - \item TODO\vspace{10pt} + input being routed to the output. + \item Output Demuxer: a one-to-many "redirector" where a single + input is "routed" to any one of a number of outputs, based + on a selection address. + \item GPIO: general-purpose reconfigureable I/O (Input/Output). \end{itemize} } @@ -56,7 +59,7 @@ (weird configuration by end-user, but no damage to ASIC)\vspace{10pt} \item One Pin to Many FN inputs: no problem\\ (weird configuration by end-user, but no damage to ASIC)\vspace{10pt} - \item Many Pins to One FN input {\bf Priority Mux needed}\\ + \item Many Pins to One FN input: {\bf Priority Mux needed}\\ No priority mux: Pin1 = HI, Pin0 = LO, ASIC is damaged\vspace{10pt} \item Some FNs (I2C\_SDA, SD\_D0..3) are I/O Buses\\ Bi-directional control of the Pin must be handed to the -- 2.30.2