From 176ff23c6fa3dde20a027ce3f4fea13b3342c223 Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Thu, 23 Aug 2018 20:36:41 -0700 Subject: [PATCH] Add dummy custom debug registers, to test OpenOCD. (#233) --- riscv/debug_module.cc | 15 +++++++++++++++ riscv/debug_module.h | 3 +++ 2 files changed, 18 insertions(+) diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc index f271d74..b209347 100644 --- a/riscv/debug_module.cc +++ b/riscv/debug_module.cc @@ -25,6 +25,7 @@ debug_module_t::debug_module_t(sim_t *sim, unsigned progbufsize, unsigned max_bu require_authentication(require_authentication), debug_progbuf_start(debug_data_start - program_buffer_bytes), debug_abstract_start(debug_progbuf_start - debug_abstract_size*4), + custom_base(0), sim(sim) { D(fprintf(stderr, "debug_data_start=0x%x\n", debug_data_start)); @@ -599,6 +600,20 @@ bool debug_module_t::perform_abstract_command() } } + } else if (regno >= 0xc000 && (regno & 1) == 1) { + // Support odd-numbered custom registers, to allow for debugger testing. + unsigned custom_number = regno - 0xc000; + abstractcs.cmderr = CMDERR_NONE; + if (write) { + // Writing V to custom register N will cause future reads of N to + // return V, reads of N-1 will return V-1, etc. + custom_base = read32(dmdata, 0) - custom_number; + } else { + write32(dmdata, 0, custom_number + custom_base); + write32(dmdata, 1, 0); + } + return true; + } else { abstractcs.cmderr = CMDERR_NOTSUP; return true; diff --git a/riscv/debug_module.h b/riscv/debug_module.h index 3aa3f0f..5b43ed6 100644 --- a/riscv/debug_module.h +++ b/riscv/debug_module.h @@ -115,6 +115,9 @@ class debug_module_t : public abstract_device_t static const unsigned debug_abstract_size = 5; unsigned debug_abstract_start; + // R/W this through custom registers, to allow debuggers to test that + // functionality. + unsigned custom_base; // We only support 1024 harts currently. More requires at least resizing // the arrays below, and their corresponding special memory regions. -- 2.30.2