From 188cdd9f1ca667a336a162e75209f5f48d2df084 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 6 Nov 2018 16:10:57 +0000 Subject: [PATCH] add sv sraw elwidth unit test --- isa/rv64ui/Makefrag.sv | 1 + isa/rv64ui/sv_sraw_elwidth.S | 91 ++++++++++++++++++++++++++++++++++++ 2 files changed, 92 insertions(+) create mode 100644 isa/rv64ui/sv_sraw_elwidth.S diff --git a/isa/rv64ui/Makefrag.sv b/isa/rv64ui/Makefrag.sv index ffbfeca..591a0cc 100644 --- a/isa/rv64ui/Makefrag.sv +++ b/isa/rv64ui/Makefrag.sv @@ -10,6 +10,7 @@ rv64ui_sv_tests = \ sv_addi_predicated \ sv_add_elwidth \ sv_addw_elwidth \ + sv_sraw_elwidth \ sv_ld_elwidth \ sv_st_elwidth \ sv_beq \ diff --git a/isa/rv64ui/sv_sraw_elwidth.S b/isa/rv64ui/sv_sraw_elwidth.S new file mode 100644 index 0000000..38dc3f3 --- /dev/null +++ b/isa/rv64ui/sv_sraw_elwidth.S @@ -0,0 +1,91 @@ +#include "riscv_test.h" +#include "sv_test_macros.h" + +RVTEST_RV64U # Define TVM used by program. + +// TODO: add extra "code" argument and "testdata" argument, +// replace "sraw" with "code" +// TODO: move SV_ELWIDTH_TEST to sv_test_macros.h +// TODO: probably remove testing of x15 and x16 (or pass in as extra args?) + +#define SV_ELWIDTH_TEST( vl, wid1, wid2, wid3, isvec1, isvec2, isvec3, \ + expect1, expect2, expect3 ) \ + \ + SV_LDD_DATA( x12, testdata , 0); \ + SV_LDD_DATA( x13, testdata+8 , 0); \ + SV_LDD_DATA( x14, testdata+16, 0); \ + SV_LDD_DATA( x15, testdata+24, 0); \ + SV_LDD_DATA( x16, testdata+32, 0); \ + SV_LDD_DATA( x17, testdata+40, 0); \ + \ + li x28, 0xa5a5a5a5a5a5a5a5; \ + li x29, 0xa5a5a5a5a5a5a5a5; \ + li x30, 0xa5a5a5a5a5a5a5a5; \ + \ + SET_SV_MVL( vl ); \ + SET_SV_3CSRS( SV_REG_CSR( 1, 15, wid1, 15, isvec1), \ + SV_REG_CSR( 1, 12, wid2, 12, isvec2), \ + SV_REG_CSR( 1, 28, wid3, 28, isvec3)); \ + SET_SV_VL( vl ); \ + \ + sraw x28, x15, x12; \ + \ + CLR_SV_CSRS(); \ + SET_SV_VL( 1); \ + SET_SV_MVL( 1); \ + \ + TEST_SV_IMM( x28, expect1 ); \ + TEST_SV_IMM( x29, expect2 ); \ + TEST_SV_IMM( x30, expect3 ); \ + TEST_SV_IMM( x15, 0x0000005242322212); \ + TEST_SV_IMM( x16, 0x0000005141312111); + + +# SV test: vector-vector add +# +# sets up x3 and x4 with data, sets VL to 2, and carries out +# an "add 1 to x3". which actually means "add 1 to x3 *AND* add 1 to x4" + +# Test code region. +RVTEST_CODE_BEGIN # Start of test code. + + # TODO: add "sraw" argument, add testdata argument + SV_ELWIDTH_TEST( 3, 0, 0, 0, 1, 1, 1, + 0x21, 0x82, 0x0000000000000000 ) + SV_ELWIDTH_TEST( 3, 0, 0, 3, 1, 1, 1, + 0x0000008200000021, 0xa5a5a5a500000000, 0xa5a5a5a5a5a5a5a5 ) + SV_ELWIDTH_TEST( 3, 1, 1, 0, 1, 1, 1, + 0x9, 0x11, 0x19 ) + SV_ELWIDTH_TEST( 3, 1, 1, 3, 1, 1, 1, + 0x0000001100000009, 0xa5a5a5a500000019, 0xa5a5a5a5a5a5a5a5 ) + SV_ELWIDTH_TEST( 3, 1, 1, 2, 1, 1, 1, + 0xa5a5001900110009, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 ) + SV_ELWIDTH_TEST( 3, 1, 1, 1, 1, 1, 1, + 0xa5a5a5a5a5191109, 0xa5a5a5a5a5a5a5a5, 0xa5a5a5a5a5a5a5a5 ) + + RVTEST_PASS # Signal success. +fail: + RVTEST_FAIL +RVTEST_CODE_END # End of test code. + +# Input data section. +# This section is optional, and this data is NOT saved in the output. +.data + .align 3 +testdata: + .dword 0x0000005949398979 + .dword 0x0000005747372717 + .dword 0x0000000000000000 + .dword 0x0000005242322212 + .dword 0x0000005141312111 + .dword 0x0000000000000000 + +# Output data section. +RVTEST_DATA_BEGIN # Start of test output data region. + .align 3 +result: + .dword -1 + .dword -1 + .dword -1 +RVTEST_DATA_END # End of test output data region. + -- 2.30.2