From 1c365752f928cb66a5e20f7041b9485653ed9a96 Mon Sep 17 00:00:00 2001 From: Las Safin Date: Wed, 15 Sep 2021 10:05:26 +0000 Subject: [PATCH] WIP --- flake.nix | 8 ++++++-- nix/c4m-jtag.nix | 6 +++--- nix/ilang.nix | 41 +++++++++++++++++++++++++++++++++++++++++ 3 files changed, 50 insertions(+), 5 deletions(-) create mode 100644 nix/ilang.nix diff --git a/flake.nix b/flake.nix index 2d50aa3f..e53653aa 100644 --- a/flake.nix +++ b/flake.nix @@ -13,6 +13,8 @@ outputs = { self, nixpkgs, c4m-jtag, nmigen, nmigen-soc }: let + getv = x: builtins.substring 0 8 x.lastModifiedDate; + supportedSystems = [ "x86_64-linux" "x86_64-darwin" "aarch64-linux" "aarch64-darwin" ]; forAllSystems = nixpkgs.lib.genAttrs supportedSystems; @@ -25,7 +27,7 @@ overrides = pfinal: pprev: { libresoc-ieee754fpu = pfinal.callPackage ./nix/ieee754fpu.nix {}; libresoc-openpower-isa = pfinal.callPackage ./nix/openpower-isa.nix {}; - c4m-jtag = pfinal.callPackage (import ./nix/c4m-jtag.nix { src = c4m-jtag; version = c4m-jtag.lastModifiedDate; }) {}; + c4m-jtag = pfinal.callPackage (import ./nix/c4m-jtag.nix { src = c4m-jtag; version = getv c4m-jtag; }) {}; bigfloat = pfinal.callPackage ./nix/bigfloat.nix {}; modgrammar = pfinal.callPackage ./nix/modgrammar.nix {}; libresoc-nmutil = pfinal.callPackage ./nix/nmutil.nix {}; @@ -42,11 +44,13 @@ }; }; - libresoc-verilog = final.callPackage (import ./nix/verilog.nix { version = self.lastModifiedDate; }) {}; + libresoc-verilog = final.callPackage (import ./nix/verilog.nix { version = getv self; }) {}; + libresoc-ilang = final.callPackage (import ./nix/ilang.nix { version = getv self; }) {}; }; packages = forAllSystems (system: { verilog = nixpkgsFor.${system}.libresoc-verilog; + ilang = nixpkgsFor.${system}.libresoc-ilang; openpower-isa = nixpkgsFor.${system}.python3Packages.libresoc-openpower-isa; }); diff --git a/nix/c4m-jtag.nix b/nix/c4m-jtag.nix index 1107244a..2bf8407a 100644 --- a/nix/c4m-jtag.nix +++ b/nix/c4m-jtag.nix @@ -4,8 +4,7 @@ buildPythonPackage { pname = "c4m-jtag"; - inherit src; - version = "2.17"; + inherit src version; nativeBuildInputs = [ setuptools-scm ]; propagatedBuildInputs = [ nmigen-soc nmigen modgrammar ]; @@ -15,8 +14,9 @@ buildPythonPackage { pythonImportsCheck = [ "c4m.nmigen.jtag.tap" ]; prePatch = '' - sed -i -e 's/use_scm_version=scm_version..,//g' setup.py + export SETUPTOOLS_SCM_PRETEND_VERSION=${version} ''; + # sed -i -e 's/use_scm_version=scm_version..,//g' setup.py meta = with lib; { homepage = "https://pypi.org/project/libresoc-openpower-isa/"; diff --git a/nix/ilang.nix b/nix/ilang.nix new file mode 100644 index 00000000..b9df6973 --- /dev/null +++ b/nix/ilang.nix @@ -0,0 +1,41 @@ +{ version }: + +{ stdenv, python3Packages, yosys, libresoc-verilog }: + +stdenv.mkDerivation { + pname = "libresoc.il"; + inherit version; + + src = ../src/soc/litex/florent; + + strictDeps = true; + + nativeBuildInputs = (with python3Packages; [ + c4m-jtag nmigen-soc python libresoc-ieee754fpu libresoc-openpower-isa + ]) ++ [ yosys ]; + + postPatch = '' + patchShebangs --build . + ''; + + configurePhase = "true"; + + buildPhase = '' + runHook preBuild + cp ${libresoc-verilog} libresoc/libresoc.v + stat ls180soc.py + ./ls180soc.py --build --platform=ls180sram4k --num-srams=2 --srams4k + echo IKJIJIJIJI + #make ls1804k + runHook postBuild + ''; + + installPhase = '' + runHook preInstall + mkdir $out + mv ls180.il ls180_cvt.il libresoc_cvt.il -t $out + runHook postInstall + ''; + + fixupPhase = "true"; +} -- 2.30.2