From 256f1afd903d2d5d8a610a5f00219ab8639cd6b1 Mon Sep 17 00:00:00 2001 From: R Veera Kumar Date: Wed, 29 Jun 2022 19:03:11 +0530 Subject: [PATCH] Remove width parameter from img tag --- openpower/sv/SimpleV_rationale.mdwn | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn index a8096629b..2fd44b865 100644 --- a/openpower/sv/SimpleV_rationale.mdwn +++ b/openpower/sv/SimpleV_rationale.mdwn @@ -903,7 +903,7 @@ definitely compelling enough to warrant in-depth investigation. **Use-case: Matrix and Convolutions** - + First, some important definitions, because there are two different Vectorisation Modes in SVP64: @@ -929,7 +929,7 @@ in full. Vertical-First may be used to perform a LD/ST within the loop, covered by `svstep`, but it is still not ideal. This is where the Snitch and EXTRA-V concepts kick in. - + Imagine a large Matrix scenario, with several values close to zero that could be skipped: no need to include zero-multiplications, but a -- 2.30.2