From 34db1ccbb8c1f6759b046662897c6e8f532c9e5c Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 23 Jul 2019 22:26:13 +0100 Subject: [PATCH] reduce next_bits by 1 --- src/ieee754/div_rem_sqrt_rsqrt/core.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/ieee754/div_rem_sqrt_rsqrt/core.py b/src/ieee754/div_rem_sqrt_rsqrt/core.py index 7c6fb181..13321698 100644 --- a/src/ieee754/div_rem_sqrt_rsqrt/core.py +++ b/src/ieee754/div_rem_sqrt_rsqrt/core.py @@ -416,7 +416,7 @@ class DivPipeCoreCalculateStage(Elaboratable): # compare_lhs >= compare_rhs is a pipeline invariant). m.submodules.pe = pe = PriorityEncoder(radix) - next_bits = Signal(log2_radix+1, reset_less=True) + next_bits = Signal(log2_radix, reset_less=True) m.d.comb += pe.i.eq(~pass_flags) with m.If(~pe.n): m.d.comb += next_bits.eq(pe.o-1) -- 2.30.2