From 363c8694d37f52bf7de72852a38a53e70f8ac695 Mon Sep 17 00:00:00 2001 From: Cesar Strauss Date: Sun, 14 Feb 2021 19:21:34 -0300 Subject: [PATCH] Fix width of the "extra" input on the Extra decoder The Extra field is nine bits long. --- src/soc/decoder/power_decoder2.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/decoder/power_decoder2.py b/src/soc/decoder/power_decoder2.py index a1a69c99..9058b80f 100644 --- a/src/soc/decoder/power_decoder2.py +++ b/src/soc/decoder/power_decoder2.py @@ -87,7 +87,7 @@ class SVP64ExtraSpec(Elaboratable): see https://libre-soc.org/openpower/sv/svp64/ """ def __init__(self): - self.extra = Signal(10, reset_less=True) + self.extra = Signal(9, reset_less=True) self.etype = Signal(SVEtype, reset_less=True) # 2 or 3 bits self.idx = Signal(SVEXTRA, reset_less=True) # which part of extra self.spec = Signal(3) # EXTRA spec for the register -- 2.30.2