From 49cf730b01a745b7f507e38367930191bd0f29f2 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Fri, 9 Mar 2018 05:15:12 +0000
Subject: [PATCH]

---
 shakti/m_class/pinmux.mdwn | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/shakti/m_class/pinmux.mdwn b/shakti/m_class/pinmux.mdwn
index 0258c5709..34178ce4e 100644
--- a/shakti/m_class/pinmux.mdwn
+++ b/shakti/m_class/pinmux.mdwn
@@ -19,7 +19,8 @@ that of ALL major well-known embedded SoCs from ST Micro, Cypress,
 Texas Instruments, NXP, Rockchip, Allwinner and many many others".
 
 * Number of wires shall be minimised especially in cases where
-  outputs need to change characteristics of the IO pad (puen, oe)
+  the IO pad (puen, oe) need to change under the control of the
+  function (not the GPIO registers).
 * There shall be no short-circuits created by multiple input
   pins trying to drive the same input function
 * The IO pad shall have pull-up enable, pull-down enable, variable
-- 
2.30.2