From 561cff6909bcfaf46ac472c877ad0a107b1f745c Mon Sep 17 00:00:00 2001 From: Greg Davill Date: Sun, 19 Apr 2020 11:32:02 +0930 Subject: [PATCH] Fix clock divider --- ecpprog.c | 30 +++++++++++++++--------------- jtag_tap.c | 32 ++++++++++++-------------------- mpsse.c | 24 +++++++++++++++--------- 3 files changed, 42 insertions(+), 44 deletions(-) diff --git a/ecpprog.c b/ecpprog.c index 52eff18..759a4ab 100644 --- a/ecpprog.c +++ b/ecpprog.c @@ -134,14 +134,12 @@ static void flash_read_id() xfer_spi(data, len); } } - - ////flash_chip_deselect(); - - // TODO: Add full decode of the JEDEC ID. + fprintf(stderr, "flash ID:"); for (int i = 1; i < len; i++) fprintf(stderr, " 0x%02X", data[i]); fprintf(stderr, "\n"); + } static void flash_reset() @@ -497,7 +495,7 @@ static void print_status_register(uint32_t status){ printf(" Invalid Command: %s\n", status & (1 << 28) ? "Yes" : "No" ); printf(" SED Error: %s\n", status & (1 << 29) ? "Yes" : "No" ); printf(" Bypass Mode: %s\n", status & (1 << 30) ? "Yes" : "No" ); - printf(" Flow Througuh Mode: %s\n", status & (1 << 31) ? "Yes" : "No" ); + printf(" Flow Through Mode: %s\n", status & (1 << 31) ? "Yes" : "No" ); } } @@ -545,15 +543,13 @@ static void enter_spi_background_mode(){ void ecp_jtag_cmd(uint8_t cmd){ - uint8_t data_in[1] = {0}; - uint8_t data_out[1] = {0}; + uint8_t data[1] = {cmd}; - data_in[0] = cmd; jtag_go_to_state(STATE_SHIFT_IR); - jtag_tap_shift(data_in, data_out, 8, true); + jtag_tap_shift(data, data, 8, true); jtag_go_to_state(STATE_RUN_TEST_IDLE); - jtag_wait_time(10); + jtag_wait_time(10); } // --------------------------------------------------------- @@ -912,15 +908,19 @@ int main(int argc, char **argv) // Initialize USB connection to FT2232H // --------------------------------------------------------- - fprintf(stderr, "init..\n"); - + fprintf(stderr, "init.."); mpsse_init(ifnum, devstr, slow_clock); + + fprintf(stderr, "jtag..\n"); mpsse_jtag_init(); + fprintf(stderr, "idcode..\n"); read_idcode(); + + fprintf(stderr, "status..\n"); read_status_register(); - usleep(20000); + //usleep(20000); if (test_mode) { @@ -934,10 +934,10 @@ int main(int argc, char **argv) /* Put device into SPI bypass mode */ enter_spi_background_mode(); - usleep(20000); + //usleep(20000); flash_reset(); - usleep(20000); + //usleep(20000); flash_read_id(); } diff --git a/jtag_tap.c b/jtag_tap.c index 204474e..e45851c 100644 --- a/jtag_tap.c +++ b/jtag_tap.c @@ -157,7 +157,7 @@ extern struct ftdi_context mpsse_ftdic; static inline uint8_t jtag_pulse_clock_and_read_tdo(bool tms, bool tdi) { uint8_t ret; - *ptr++ = MC_DATA_TMS | MC_DATA_IN | MC_DATA_LSB | MC_DATA_BITS; + *ptr++ = MC_DATA_TMS | MC_DATA_IN | MC_DATA_LSB | MC_DATA_BITS; *ptr++ = 0; uint8_t data0 = 0; @@ -192,9 +192,6 @@ void jtag_tap_shift( for (uint32_t i = 0; i < byte_count; ++i) { uint8_t byte_out = input_data[i]; uint8_t tdo_byte = 0; - - - for (int j = 0; j < 8 && bit_count-- > 0; ++j) { bool tms = false; bool tdi = false; @@ -211,8 +208,6 @@ void jtag_tap_shift( bool tdo = jtag_pulse_clock_and_read_tdo(tms, tdi); tdo_byte |= tdo << j; } - - } printf(" Tx: %u, Rx: %u\n", ptr-data, rx_cnt); int rc = ftdi_write_data(&mpsse_ftdic, &data, ptr-data); @@ -220,6 +215,8 @@ void jtag_tap_shift( fprintf(stderr, "Write error (single byte, rc=%d, expected %d).\n", rc, 1); mpsse_error(2); } + + rc = ftdi_read_data(&mpsse_ftdic, &data, rx_cnt); if (rc < 0) { fprintf(stderr, "Read error.\n"); @@ -240,24 +237,12 @@ void jtag_state_ack(bool tms) void jtag_state_step(bool tms) { - - //mpsse_send_byte(MC_DATA_TMS | MC_DATA_LSB | MC_DATA_BITS); - //mpsse_send_byte(0); - if (tms) { - // mpsse_send_byte(1); - } else { - // mpsse_send_byte(0); - } - jtag_state_ack(tms); } -uint8_t bit_reverse(uint8_t); - void jtag_go_to_state(unsigned state) { - mpsse_purge(); if (state == STATE_TEST_LOGIC_RESET) { for (int i = 0; i < 5; ++i) { @@ -288,8 +273,15 @@ void jtag_go_to_state(unsigned state) void jtag_wait_time(uint32_t microseconds) { - while (microseconds--) { - jtag_pulse_clock(); + uint16_t bytes = microseconds / 8; + uint8_t remain = microseconds % 8; + mpsse_send_byte( MC_CLK_N8 ); + mpsse_send_byte(bytes & 0xFF); + mpsse_send_byte((bytes >> 8) & 0xFF); + + if(remain){ + mpsse_send_byte( MC_CLK_N ); + mpsse_send_byte( remain ); } } diff --git a/mpsse.c b/mpsse.c index 93a09f6..43e91b6 100644 --- a/mpsse.c +++ b/mpsse.c @@ -61,12 +61,17 @@ unsigned char mpsse_ftdi_latency; void mpsse_check_rx() { + uint8_t cnt = 0; while (1) { uint8_t data; int rc = ftdi_read_data(&mpsse_ftdic, &data, 1); if (rc <= 0) break; fprintf(stderr, "unexpected rx byte: %02X\n", data); + cnt++; + + if(cnt > 32) + break; } } @@ -103,7 +108,7 @@ void mpsse_send_byte(uint8_t data) { int rc = ftdi_write_data(&mpsse_ftdic, &data, 1); if (rc != 1) { - fprintf(stderr, "Write error (single byte, rc=%d, expected %d).\n", rc, 1); + fprintf(stderr, "Write error (single byte, rc=%d, expected %d)(%s).\n", rc, 1, ftdi_get_error_string(&mpsse_ftdic)); mpsse_error(2); } } @@ -284,12 +289,18 @@ void mpsse_init(int ifnum, const char *devstr, bool slow_clock) /* Enter MPSSE (Multi-Protocol Synchronous Serial Engine) mode. Set all pins to output. */ if (ftdi_set_bitmode(&mpsse_ftdic, 0xff, BITMODE_MPSSE) < 0) { - fprintf(stderr, "Failed to set BITMODE_MPSSE on iCE FTDI USB device.\n"); + fprintf(stderr, "Failed to set BITMODE_MPSSE on FTDI USB device.\n"); + mpsse_error(2); + } + + int rc = ftdi_usb_purge_buffers(&mpsse_ftdic); + if (rc != 0) { + fprintf(stderr, "Purge error.\n"); mpsse_error(2); } // enable clock divide by 5 - mpsse_send_byte(MC_TCK_D5); + //mpsse_send_byte(MC_TCK_D5); if (slow_clock) { // set 50 kHz clock @@ -299,15 +310,10 @@ void mpsse_init(int ifnum, const char *devstr, bool slow_clock) } else { // set 6 MHz clock mpsse_send_byte(MC_SET_CLK_DIV); - mpsse_send_byte(0x00); + mpsse_send_byte(5); mpsse_send_byte(0x00); } - int rc = ftdi_usb_purge_buffers(&mpsse_ftdic); - if (rc != 0) { - fprintf(stderr, "Purge error.\n"); - mpsse_error(2); - } } void mpsse_close(void) -- 2.30.2