From 618edaa9c107e89082a0ed79499b9a00a5ffcbbe Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Thu, 22 Mar 2018 12:40:01 +0000
Subject: [PATCH] add testing

---
 shakti/m_class.mdwn | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/shakti/m_class.mdwn b/shakti/m_class.mdwn
index c6c9c32a6..4a6f2b2a3 100644
--- a/shakti/m_class.mdwn
+++ b/shakti/m_class.mdwn
@@ -337,6 +337,11 @@ and accurate PLL clock timing provided, it may become possible to bit-bang
 and software-emulate high-speed interfaces such as SATA, HDMI, PCIe and
 many more.
 
+# Testing
+
+* cocotb 
+* <https://github.com/aoeldemann/cocotb> cocotb AXI4 stream interface
+
 # Research (to investigate)
 
 * <https://level42.ca/projects/ultra64/Documentation/man/pro-man/pro25/index25.1.html>
-- 
2.30.2