From 6bc685d16a558be452bc5b8d32bd3e6def816f4a Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 24 May 2023 13:32:04 +0100 Subject: [PATCH] --- simple_v_extension/daxpy_example.mdwn | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) diff --git a/simple_v_extension/daxpy_example.mdwn b/simple_v_extension/daxpy_example.mdwn index d870523be..2a243d2df 100644 --- a/simple_v_extension/daxpy_example.mdwn +++ b/simple_v_extension/daxpy_example.mdwn @@ -7,10 +7,15 @@ } ``` -# SVP64 Power ISA version +Summary + +| ISA | total | loop | words | notes | +|-----|-------|------|-------|-------| +| SVP64 | 9 | 7 | 14 | 5 64-bit, 4 32-bit | +| RVV | 13 | 11 | 9.5 | 7 32-bit, 5 16-bit | +| SVE | 12 | 7 | 12 | all 32-bit | -Summary: 9 instructions, 5 of which are 64-bit -for a total of 14 "words". +# SVP64 Power ISA version Relies on post-increment, relies on no overlap between x and y in memory, and critically relies on y overwrite. x is post-incremented @@ -37,7 +42,6 @@ a contiguous Vector Load *without* modifying RA. # RVV version -Summary: 12 instructions, 7 32-bit and 5 16-bit for a total of 9.5 "words" ``` # a0 is n, a1 is pointer to x[0], a2 is pointer to y[0], fa0 is a @@ -59,8 +63,6 @@ Summary: 12 instructions, 7 32-bit and 5 16-bit for a total of 9.5 "words" # SVE Version -Summary: 12 instructions, all 32-bit, for a total of 12 "words" - ``` 1 // x0 = &x[0], x1 = &y[0], x2 = &a, x3 = &n 2 daxpy_: -- 2.30.2