From 70e07ee8d91e51b8961dba7e616f465c39422207 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 11 Apr 2022 16:33:02 +0100 Subject: [PATCH] put versa_ecp5 below 50 mhz as a bodge-way to stop it trying to create a DDR3 peripheral. this then activates placing an SRAM (BRAM) at 0x0000_0000 of size 0x8000 which can be used for a micro-test of booting from QSPI. and 0x8000 SRAM is much easier to simulate in icarus verilog --- src/ls2.py | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/src/ls2.py b/src/ls2.py index 1e0ca44..0d11514 100644 --- a/src/ls2.py +++ b/src/ls2.py @@ -399,14 +399,15 @@ class DDR3SoC(SoC, Elaboratable): self.drambone = drs(drambone) self._decoder.add(self.drambone.bus, addr=ddr_addr) - # additional SRAM at address if DRAM is not also at 0x0 - # (TODO, check Flash, and HyperRAM as well) - if ddr_addr != 0x0: - sram_width = 32 - self.bootmem = SRAMPeripheral(size=0x8000, - data_width=sram_width, - writable=True) - self._decoder.add(self.bootmem.bus, addr=0x0) # RAM at 0x0 + # additional SRAM at address if DRAM is not also at 0x0 + # (TODO, check Flash, and HyperRAM as well) + if ddr_pins is None or ddr_addr != 0x0: + print ("SRAM 0x8000 at address 0x0") + sram_width = 32 + self.sram = SRAMPeripheral(size=0x8000, + data_width=sram_width, + writable=True) + self._decoder.add(self.sram.bus, addr=0x0) # RAM at 0x0 # SPI controller if spi_0_pins is not None and fpga in ['sim', @@ -474,6 +475,8 @@ class DDR3SoC(SoC, Elaboratable): if platform is not None and hasattr(self, "crg"): m.submodules.sysclk = self.crg + if hasattr(self, "sram"): + m.submodules.sram = self.sram if hasattr(self, "bootmem"): m.submodules.bootmem = self.bootmem m.submodules.syscon = self.syscon @@ -659,7 +662,7 @@ def build_platform(fpga, firmware): if fpga == 'isim': clk_freq = 55e6 # below 50 mhz, stops DRAM being enabled if fpga == 'versa_ecp5': - clk_freq = 55e6 # crank right down to test hyperram + clk_freq = 45e6 # crank right down to test hyperram if fpga == 'versa_ecp5_85': # 50MHz works. 100MHz works. 55MHz does NOT work. # Stick with multiples of 50MHz... -- 2.30.2