From 75b22a7ffca0b6d93b743e2dfa00d093c7dff03d Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 4 May 2018 16:52:37 +0100 Subject: [PATCH] add clarification from jacob --- isa_conflict_resolution/mvendor_march_mimplid.mdwn | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/isa_conflict_resolution/mvendor_march_mimplid.mdwn b/isa_conflict_resolution/mvendor_march_mimplid.mdwn index 25b5f8bda..f1fea543e 100644 --- a/isa_conflict_resolution/mvendor_march_mimplid.mdwn +++ b/isa_conflict_resolution/mvendor_march_mimplid.mdwn @@ -27,9 +27,18 @@ it can have multiple mvendorid-marchid-mimplid tuples, where each core (hart) has *one* and *only* one tuple. Thus, running different encodings is a simple matter of selecting the correct core. +clarification from jacob: + +> it solves the problem of one implementation needing to implement +> conflicting extensions, with some limitations, specifically that each of +> the conflicting extensions must be used in separate threads. The Rocket +> RoCC coprocessor interface, in a multi-tile SoC where different tiles +> have different coprocessors, provides a working example of this model. +> The overall system has both of two conflicting coprocessors. + There are a couple of issues with this approach: -* Single-core implementations are not possible. +* Single-core (single hart) implementations are not possible. * Multi-core implementations are guaranteed, for high workloads, to have "incompatible" cores sitting idle whilst "compatible" cores are overloaded. -- 2.30.2