From 7b08bf1c974640cf82c50d040abf74f5563a0a59 Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sat, 3 Mar 2018 09:02:02 +0000
Subject: [PATCH]

---
 shakti/m_class/EINT.mdwn | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/shakti/m_class/EINT.mdwn b/shakti/m_class/EINT.mdwn
index e69de29bb..fa3ca9b6f 100644
--- a/shakti/m_class/EINT.mdwn
+++ b/shakti/m_class/EINT.mdwn
@@ -0,0 +1,7 @@
+# EINT
+
+* <http://bugs.libre-riscv.org/show_bug.cgi?id=14>
+* <https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/>
+  includes GPIO, SPI, UART, JTAG, I2C, PinCtrl, UART and PWM.  Also included
+  is a Watchdog Timer and others.
+* <https://opencores.org/project,simple_pic>
-- 
2.30.2