From 8638d640c602a23a747afeb881980737c365b9cd Mon Sep 17 00:00:00 2001
From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 7 Mar 2018 07:34:45 +0000
Subject: [PATCH] add GPIO page

---
 shakti/m_class/GPIO.mdwn | 8 ++++++++
 1 file changed, 8 insertions(+)
 create mode 100644 shakti/m_class/GPIO.mdwn

diff --git a/shakti/m_class/GPIO.mdwn b/shakti/m_class/GPIO.mdwn
new file mode 100644
index 000000000..a747e629e
--- /dev/null
+++ b/shakti/m_class/GPIO.mdwn
@@ -0,0 +1,8 @@
+# GPIO
+
+* <http://bugs.libre-riscv.org/show_bug.cgi?id=15>
+* <https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/>
+  includes GPIO, SPI, UART, JTAG, I2C, PinCtrl, UART and PWM.  Also included
+  is a Watchdog Timer and others.
+* <https://bitbucket.org/casl/c-class/src/0e77398a030bfd705930d0f1b8b9b5050d76e265/src/peripherals/gpio/?at=master>
+
-- 
2.30.2