From 8dd673b74499d0195f6b1308a6709e05db6fa571 Mon Sep 17 00:00:00 2001 From: Tim Newsome Date: Wed, 15 Feb 2017 20:41:06 -0800 Subject: [PATCH] Set cmderr when data is accessed while busy. --- riscv/debug_module.cc | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/riscv/debug_module.cc b/riscv/debug_module.cc index 8d93e9e..af71974 100644 --- a/riscv/debug_module.cc +++ b/riscv/debug_module.cc @@ -221,6 +221,10 @@ bool debug_module_t::dmi_read(unsigned address, uint32_t *value) unsigned i = address - DMI_DATA0; result = dmdata.read32(4 * i); + if (abstractcs.busy && abstractcs.cmderr == abstractcs.CMDERR_NONE) { + abstractcs.cmderr = abstractcs.CMDERR_BUSY; + } + bool autoexec = false; switch (i) { case 0: autoexec = abstractcs.autoexec0; break; @@ -376,6 +380,10 @@ bool debug_module_t::dmi_write(unsigned address, uint32_t value) unsigned i = address - DMI_DATA0; dmdata.write32(4 * i, value); + if (abstractcs.busy && abstractcs.cmderr == abstractcs.CMDERR_NONE) { + abstractcs.cmderr = abstractcs.CMDERR_BUSY; + } + bool autoexec = false; switch (i) { case 0: autoexec = abstractcs.autoexec0; break; -- 2.30.2