From 9380181f4c19e845730c8fbbecf18fcbfc9b6f06 Mon Sep 17 00:00:00 2001 From: Cesar Strauss Date: Mon, 7 Dec 2020 18:44:40 -0300 Subject: [PATCH] Display the instruction type as a vector on cxxsim It doesn't support enums traces yet. --- src/soc/experiment/test/test_compalu_multi.py | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/src/soc/experiment/test/test_compalu_multi.py b/src/soc/experiment/test/test_compalu_multi.py index 7120901b..483b3741 100644 --- a/src/soc/experiment/test/test_compalu_multi.py +++ b/src/soc/experiment/test/test_compalu_multi.py @@ -732,7 +732,9 @@ def test_compunit_regspec3(): ('operation port', {'color': 'red'}, [ 'cu_issue_i', 'cu_busy_o', {'comment': 'operation'}, - ('oper_i_None__insn_type', {'display': 'insn_type'})]), + ('oper_i_None__insn_type' + + ('' if is_engine_pysim() else '[6:0]'), + {'display': 'insn_type'})]), ('operand 1 port', 'in', [ ('cu_rd__rel_o[2:0]', {'bit': 2}), ('cu_rd__go_i[2:0]', {'bit': 2}), @@ -794,7 +796,9 @@ def test_compunit_regspec1(): ('operation port', {'color': 'red'}, [ 'cu_issue_i', 'cu_busy_o', {'comment': 'operation'}, - ('oper_i_None__insn_type', {'display': 'insn_type'}), + ('oper_i_None__insn_type' + + ('' if is_engine_pysim() else '[6:0]'), + {'display': 'insn_type'}), ('oper_i_None__invert_in', {'display': 'invert_in'}), ('oper_i_None__imm_data__data[63:0]', {'display': 'data[63:0]'}), ('oper_i_None__imm_data__ok', {'display': 'imm_ok'}), -- 2.30.2