From 96226aa1f22bd481d50149f7878cb41245125f3c Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 3 Jul 2022 10:58:44 +0100 Subject: [PATCH] --- openpower/sv/setvl.mdwn | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/openpower/sv/setvl.mdwn b/openpower/sv/setvl.mdwn index d6f9eadbb..a93fceaf2 100644 --- a/openpower/sv/setvl.mdwn +++ b/openpower/sv/setvl.mdwn @@ -165,20 +165,19 @@ Vector operations. When Rc=1 it is possible to determine when any level of loops reach an end condition, or if VL has been reached. The immediate can be reinterpreted as indicating which SVSTATE (0-3) -should be tested and placed into CR0. +should be tested and placed into CR0 (when Rc=1) -TODO clarify/investigate +When RT is not zero, an internal stepping index may also be returned, +either the REMAP index or srcstep or dststep. This table is identical +to that of [[sv/svstep]]: -* `SVi=1`: only VL testing is enabled. CR0.SO is set - to 1 when either srcstep or dststep reach VL -* `SVi=2`: also include inner middle and outer +* `SVi=1`: also include inner middle and outer loop end conditions from SVSTATE0 into CR.EQ CR.LE CR.GT -* `SVi=3`: test SVSTATE1 -* `SVi=4`: test SVSTATE2 -* `SVi=5`: test SVSTATE3 -* When `SVi` is 6, `SVSTATE.srcstep` is returned. -* When `SVi` is 7, `SVSTATE.dststep` is returned. - +* `SVi=2`: test SVSTATE1 (and return conditions) +* `SVi=3`: test SVSTATE2 (and return conditions) +* `SVi=4`: test SVSTATE3 (and return conditions) +* `SVi=5`: `SVSTATE.srcstep` is returned. +* `SVi=6`: `SVSTATE.dststep` is returned. Testing any end condition of any loop of any REMAP state allows branches to be used to create loops. -- 2.30.2