From 9a13f2d7fe1e27d0956fbed7e8841bbefd29d7fb Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 7 Mar 2021 16:38:52 +0000 Subject: [PATCH] --- 3d_gpu/architecture/dynamic_simd/logicops.mdwn | 9 --------- 1 file changed, 9 deletions(-) diff --git a/3d_gpu/architecture/dynamic_simd/logicops.mdwn b/3d_gpu/architecture/dynamic_simd/logicops.mdwn index 48f325b5c..8a51be53e 100644 --- a/3d_gpu/architecture/dynamic_simd/logicops.mdwn +++ b/3d_gpu/architecture/dynamic_simd/logicops.mdwn @@ -16,15 +16,6 @@ they are instead SIMD versions of: for i in range(64): result = result xor a[i] # one operand -more specifically (8x8 version): - - result = 0 # i bit, clear all bits - for j in range(8) - partial = 0 # initial value (single bit) - for i in range(8): - partial = partial xor a[i+j*8] - result[j] = partial - # Requirements Given a signal width (typically 64) and given an array of "Partition Points" (typically 7) that break the signal down into an arbitrary permutaion of 8 bit to 64 bit independent SIMD results, compute the following: -- 2.30.2