From ae83cd7eda6f11a3367c255b4fd2c4eaf07a6df8 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 13 Apr 2023 04:55:46 +0100 Subject: [PATCH] --- openpower/sv/svp64.mdwn | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn index 700d26b9e..3eda8f6cc 100644 --- a/openpower/sv/svp64.mdwn +++ b/openpower/sv/svp64.mdwn @@ -91,6 +91,13 @@ the [[svp64/appendix]]. ## Strict Program Order +Strict Program Order is defined as giving the appearance, as far +as programs are concerned, that instructions were executed +strictly in the sequence that they occurred. A "Precise" +out-of-order +Micro-architecture goes to considerable lengths to ensure that +this is the case. + Many Vector ISAs allow interrupts to occur in the middle of processing of large Vector operations, only under the condition that continuation on return will restart the entire operation. @@ -101,7 +108,11 @@ Simple-V operates on an entirely different paradigm from traditional Vector ISAs: as a Sub-Program Counter where "Elements" are synonymous with Scalar instructions. With this in mind it is critical for implementations to observe Strict Element-Level Program Order -at all times. *Any* element is Interruptible and Simple-V has +at all times +(often simply referred to as just "Strict Program Order" +throughout +this Chapter). +*Any* element is Interruptible and Simple-V has been carefully designed to ensure that Architectural State may be fully preserved regardless of that same State. @@ -133,11 +144,6 @@ for example), which will force implementations to perform divide and modulo calculations. -With that context in mind it is important to bear in mind throughout -this document that when referring to "Strict Program Order", this -includes Elements, because in Simple-V all Elements -are conceptually synonymous with Scalar execution. - ## SVP64 encoding features A number of features need to be compacted into a very small space of -- 2.30.2