From b5a7178845c31d1f4e364c3d4267bad38d9de86f Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 19 Aug 2019 12:25:38 +0100 Subject: [PATCH] name LSBNotTerm submodules after bitwidth --- src/ieee754/part_mul_add/multiply.py | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/ieee754/part_mul_add/multiply.py b/src/ieee754/part_mul_add/multiply.py index db1f267b..c443b629 100644 --- a/src/ieee754/part_mul_add/multiply.py +++ b/src/ieee754/part_mul_add/multiply.py @@ -590,7 +590,7 @@ class Part(Elaboratable): for i in range(len(parts)): # work out bit-inverted and +1 term for a. pa = LSBNegTerm(bit_wid) - setattr(m.submodules, "lnt_a_%d" % i, pa) + setattr(m.submodules, "lnt_%d_a_%d" % (bit_wid, i), pa) m.d.comb += pa.part.eq(parts[i]) m.d.comb += pa.op.eq(self.a.bit_select(bit_wid * i, bit_wid)) m.d.comb += pa.signed.eq(self.b_signed[i * byte_width]) # yes b @@ -600,7 +600,7 @@ class Part(Elaboratable): # work out bit-inverted and +1 term for b pb = LSBNegTerm(bit_wid) - setattr(m.submodules, "lnt_b_%d" % i, pb) + setattr(m.submodules, "lnt_%d_b_%d" % (bit_wid, i), pb) m.d.comb += pb.part.eq(parts[i]) m.d.comb += pb.op.eq(self.b.bit_select(bit_wid * i, bit_wid)) m.d.comb += pb.signed.eq(self.a_signed[i * byte_width]) # yes a -- 2.30.2