From b6bca680366d5e34bd614645cdd4510c6baccb24 Mon Sep 17 00:00:00 2001 From: Cesar Strauss Date: Sat, 10 Jul 2021 18:53:22 -0300 Subject: [PATCH] Show some usage of PortInterface in action --- src/soc/simple/test/test_runner.py | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/src/soc/simple/test/test_runner.py b/src/soc/simple/test/test_runner.py index cb4ca458..342a7ee0 100644 --- a/src/soc/simple/test/test_runner.py +++ b/src/soc/simple/test/test_runner.py @@ -414,6 +414,17 @@ class TestRunner(FHDLTestCase): 'core.int.rp_src1.memory(9)[63:0]', 'core.int.rp_src1.memory(10)[63:0]', 'core.int.rp_src1.memory(13)[63:0]', + {'comment': 'memory port interface'}, + 'core.l0.pimem.ldst_port0_is_ld_i', + 'core.l0.pimem.ldst_port0_is_st_i', + 'core.l0.pimem.ldst_port0_busy_o', + 'core.l0.pimem.ldst_port0_addr_i[47:0]', + 'core.l0.pimem.ldst_port0_addr_i_ok', + 'core.l0.pimem.ldst_port0_addr_ok_o', + 'core.l0.pimem.ldst_port0_st_data_i[63:0]', + 'core.l0.pimem.ldst_port0_st_data_i_ok', + 'core.l0.pimem.ldst_port0_ld_data_o[63:0]', + 'core.l0.pimem.ldst_port0_ld_data_o_ok' ] if self.microwatt_mmu: -- 2.30.2