From b8febca18a619a34ddd631353fefa7cc563fd34a Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Fri, 7 Jan 2022 16:57:56 +0000 Subject: [PATCH] add missing MSRSpec import --- src/soc/experiment/test/test_ldst_pi.py | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/soc/experiment/test/test_ldst_pi.py b/src/soc/experiment/test/test_ldst_pi.py index fa7bc660..003edf12 100644 --- a/src/soc/experiment/test/test_ldst_pi.py +++ b/src/soc/experiment/test/test_ldst_pi.py @@ -27,6 +27,8 @@ from soc.fu.ldst.loadstore import LoadStore1 from soc.experiment.mmu import MMU from nmigen.compat.sim import run_simulation +from openpower.decoder.power_enums import MSRSpec + msr_default = MSRSpec(pr=1, dr=0, sf=1) # 64 bit by default -- 2.30.2