From c69dc12c39cde2da2293ff39cdb5391e99e3aa86 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 25 Jul 2018 07:12:38 +0100 Subject: [PATCH] pep8 cleanup --- src/bsv/interface_decl.py | 24 ++++++++++++------------ src/bsv/peripheral_gen/base.py | 2 +- src/bsv/peripheral_gen/gpio.py | 2 +- src/bsv/peripheral_gen/jtag.py | 1 - src/bsv/peripheral_gen/qspi.py | 2 ++ src/bsv/peripheral_gen/sdmmc.py | 1 - src/bsv/peripheral_gen/spi.py | 3 ++- src/spec/i_class.py | 2 +- src/spec/pinfunctions.py | 1 + 9 files changed, 20 insertions(+), 18 deletions(-) diff --git a/src/bsv/interface_decl.py b/src/bsv/interface_decl.py index 404cfd4..1efeac1 100644 --- a/src/bsv/interface_decl.py +++ b/src/bsv/interface_decl.py @@ -359,7 +359,7 @@ class Interface(PeripheralIface): plens = range(len(pins)) else: for i in range(0, len(pins), 3): - plens += [i/3, i/3, i/3] + plens += [i / 3, i / 3, i / 3] for (typ, txt) in map(self.ifacedef3pin, plens, pins): if typ == 'tput': tput.append(txt) @@ -378,14 +378,14 @@ class Interface(PeripheralIface): endmethod endinterface; """, -"""\ + """\ interface {3} = interface Put#({0}) method Action put({2} in); {1} endmethod endinterface; """, -"""\ + """\ interface {3} = interface Get#({0}) method ActionValue#({2}) get; {2} tget; @@ -429,7 +429,7 @@ class InterfaceBus(object): def __init__(self, namelist, bitspec, filterbus): self.namelist = namelist self.bitspec = bitspec - self.fbus = filterbus # filter identifying which are bus pins + self.fbus = filterbus # filter identifying which are bus pins def get_nonbuspins(self): return filter(lambda x: not x.name_.startswith(self.fbus), self.pins) @@ -463,8 +463,8 @@ class InterfaceBus(object): pins = self.get_buspins() plen = self.get_n_iopins(pins) bitspec = self.bitspec.format(plen) - return '\n' + res + self.vectorifacedef2(pins, plen, - self.namelist, bitspec, *args) + '\n' + return '\n' + res + self.vectorifacedef2( + pins, plen, self.namelist, bitspec, *args) + '\n' def ifacedef3pin(self, idx, pin): decfn = self.ifacefmtdecfn2 @@ -484,8 +484,8 @@ class InterfaceLCD(InterfaceBus, Interface): "Bit#({0})", "out") Interface.__init__(self, *args) - def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3 - return len(pins) + def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3 + return len(pins) class InterfaceSD(InterfaceBus, Interface): @@ -495,7 +495,7 @@ class InterfaceSD(InterfaceBus, Interface): "Bit#({0})", "d") Interface.__init__(self, *args) - def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3 + def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3 return len(pins) / 3 @@ -506,13 +506,14 @@ class InterfaceNSPI(InterfaceBus, Interface): "Bit#({0})", "io") Interface.__init__(self, *args) - def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3 + def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3 return len(pins) / 3 class InterfaceEINT(Interface): """ uses old-style (non-get/put) for now """ + def ifacepfmt(self, *args): res = '\n'.join(map(self.ifacefmtdecpin, self.pins)).format(*args) return '\n' + res # pins is a list @@ -521,7 +522,6 @@ class InterfaceEINT(Interface): return self.ifacedef(*args) - class InterfaceGPIO(InterfaceBus, Interface): """ note: the busfilter cuts out everything as the entire set of pins is a bus, but it's less code. get_nonbuspins returns empty list. @@ -532,7 +532,7 @@ class InterfaceGPIO(InterfaceBus, Interface): "Vector#({0},Bit#(1))", ifacename[-1]) Interface.__init__(self, ifacename, pinspecs, ganged, single) - def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3 + def get_n_iopins(self, pins): # HACK! assume in/out/outen so div by 3 return len(pins) / 3 diff --git a/src/bsv/peripheral_gen/base.py b/src/bsv/peripheral_gen/base.py index fef5dbe..0d4384b 100644 --- a/src/bsv/peripheral_gen/base.py +++ b/src/bsv/peripheral_gen/base.py @@ -187,7 +187,6 @@ class PBase(object): return template.format(pname, sname) - mkplic_rule = """\ rule rl_connect_{0}_to_plic_{2}; if({1} == 1'b1) begin @@ -436,6 +435,7 @@ class PeripheralInterfaces(object): iname = self.data[name].iname().format(i) return iname in self.fastbus + class PFactory(object): def getcls(self, name): from uart import uart diff --git a/src/bsv/peripheral_gen/gpio.py b/src/bsv/peripheral_gen/gpio.py index 4b6ab4c..418454b 100644 --- a/src/bsv/peripheral_gen/gpio.py +++ b/src/bsv/peripheral_gen/gpio.py @@ -11,7 +11,7 @@ class gpio(PBase): def slowifdeclmux(self, name, count): size = len(self.peripheral.pinspecs) return " interface GPIO_config#(%d) pad_config%d;" % \ - (size, count) + (size, count) def num_axi_regs32(self): return 2 diff --git a/src/bsv/peripheral_gen/jtag.py b/src/bsv/peripheral_gen/jtag.py index 6aca84e..a409280 100644 --- a/src/bsv/peripheral_gen/jtag.py +++ b/src/bsv/peripheral_gen/jtag.py @@ -11,4 +11,3 @@ class jtag(PBase): def axi_addr_map(self, name, ifacenum): return '' - diff --git a/src/bsv/peripheral_gen/qspi.py b/src/bsv/peripheral_gen/qspi.py index 18ae219..fddbd81 100644 --- a/src/bsv/peripheral_gen/qspi.py +++ b/src/bsv/peripheral_gen/qspi.py @@ -1,9 +1,11 @@ from bsv.peripheral_gen.nspi import nspi + class mqspi(nspi): def __init__(self, name): nspi.__init__(self, name, True) + class qspi(nspi): def __init__(self, name): nspi.__init__(self, name, False) diff --git a/src/bsv/peripheral_gen/sdmmc.py b/src/bsv/peripheral_gen/sdmmc.py index 69f2d76..e963eb7 100644 --- a/src/bsv/peripheral_gen/sdmmc.py +++ b/src/bsv/peripheral_gen/sdmmc.py @@ -32,4 +32,3 @@ class sdmmc(PBase): for ptype in ['out', 'out_en', 'in']: ret.append(template.format(ps, ptype, n)) return '\n'.join(ret) - diff --git a/src/bsv/peripheral_gen/spi.py b/src/bsv/peripheral_gen/spi.py index 8b347ae..baec1bf 100644 --- a/src/bsv/peripheral_gen/spi.py +++ b/src/bsv/peripheral_gen/spi.py @@ -1,10 +1,11 @@ from bsv.peripheral_gen.nspi import nspi + class mspi(nspi): def __init__(self, name): nspi.__init__(self, name, True) + class spi(nspi): def __init__(self, name): nspi.__init__(self, name, False) - diff --git a/src/spec/i_class.py b/src/spec/i_class.py index 5d73b26..e70414c 100644 --- a/src/spec/i_class.py +++ b/src/spec/i_class.py @@ -90,7 +90,7 @@ def pinspec(): # lists (interfaces, EINTs, PWMs) from available pins. i_class = ['ULPI0/8', 'ULPI1', 'MMC', 'SD0', 'UART0', - 'TWI0', 'MSPI0', 'B3:SD1', ] + 'TWI0', 'MSPI0', 'B3:SD1', ] i_class_eint = ['EINT_0', 'EINT_1', 'EINT_2', 'EINT_3', 'EINT_4'] i_class_pwm = ['B2:PWM_0'] descriptions = { diff --git a/src/spec/pinfunctions.py b/src/spec/pinfunctions.py index 0aa4ae8..33226e4 100644 --- a/src/spec/pinfunctions.py +++ b/src/spec/pinfunctions.py @@ -73,6 +73,7 @@ def nspi(suffix, bank, iosize, masteronly=True): inout.append(pname) return (qpins, inout) + def mspi(suffix, bank): return nspi(suffix, bank, 2, masteronly=True) -- 2.30.2