From ebbdac97987cb91e2418e80e2416c3a81f1dabdc Mon Sep 17 00:00:00 2001 From: Konrad Beckmann Date: Fri, 6 Nov 2020 12:35:18 +0100 Subject: [PATCH] vendor.intel: add support for Cyclone V internal oscillator When using the default clock "cyclonev_oscillator" on Cyclone V devices, the internal oscillator will be used. --- nmigen/vendor/intel.py | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/nmigen/vendor/intel.py b/nmigen/vendor/intel.py index 92157f6..8393dea 100644 --- a/nmigen/vendor/intel.py +++ b/nmigen/vendor/intel.py @@ -146,6 +146,31 @@ class IntelPlatform(TemplatedPlatform): super().add_clock_constraint(clock, frequency) clock.attrs["keep"] = "true" + @property + def default_clk_constraint(self): + # Internal high-speed oscillator on Cyclone V devices. + # It is specified to not be faster than 100MHz, but the actual + # frequency seems to vary a lot between devices. Measurements + # of 78 to 84 MHz have been observed. + if self.default_clk == "cyclonev_oscillator": + assert self.device.startswith("5C") + return Clock(100e6) + # Otherwise, use the defined Clock resource. + return super().default_clk_constraint + + def create_missing_domain(self, name): + if name == "sync" and self.default_clk == "cyclonev_oscillator": + # Use the internal high-speed oscillator for Cyclone V devices + assert self.device.startswith("5C") + m = Module() + m.domains += ClockDomain("sync") + m.submodules += Instance("cyclonev_oscillator", + i_oscena=Const(1), + o_clkout=ClockSignal("sync")) + return m + else: + return super().create_missing_domain(name) + # The altiobuf_* and altddio_* primitives are explained in the following Intel documents: # * https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altiobuf.pdf # * https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altddio.pdf -- 2.30.2