From f6c33c2c48495a349abd3f7c8891c68a2d3a0cdd Mon Sep 17 00:00:00 2001 From: "colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0" Date: Wed, 21 Oct 2020 18:42:18 +0100 Subject: [PATCH] --- resources.mdwn | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/resources.mdwn b/resources.mdwn index 70b607739..4d66f4d85 100644 --- a/resources.mdwn +++ b/resources.mdwn @@ -31,6 +31,14 @@ This section is primarily a series of useful links found online * [OpenPOWER OpenFSI Compliance Spec](http://openpowerfoundation.org/wp-content/uploads/resources/openpower-fsi-thts-1.0/openpower-fsi-thts-20180130.pdf) +## JTAG + +* [Useful JTAG implementation reference: Design Of IEEE 1149.1 TAP Controller IP Core by Shelja, Nandakumar and Muruganantham, DOI:10.5121/csit.2016.60910](https://airccj.org/CSCP/vol6/csit65610.pdf) + + Abstract + + "The objective of this work is to design and implement a TAP controller IP core compatible with IEEE 1149.1-2013 revision of the standard. The test logic architecture also includes the Test Mode Persistence controller and its associated logic. This work is expected to serve as a ready to use module that can be directly inserted in to a new digital IC designs with little modifications." + # RISC-V Instruction Set Architecture **PLEASE UPDATE** - we are no longer implementing full RISCV, only user-space -- 2.30.2