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Merge pull request #2082 from YosysHQ/eddie/abc9_scc_fixes
2020-06-01
Miodrag Milanovic
allow range for mux test
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2020-06-01
Miodrag Milanovic
Support asymmetric memories for verific frontend
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2020-04-15
Miodrag Milanovic
Fix compile for mingw
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2020-04-10
Miodrag Milanovic
Keep libyosys name same as befire, but put it in directory
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2020-04-10
Miodrag Milanovic
Support custom PROGRAM_PREFIX
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2020-03-28
Miodrag Milanovic
Explicit include of csignal
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2020-03-28
Miodrag Milanovic
windows - there are no stopping signals
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2020-03-25
Miodrag Milanovic
Enable ENABLE_LIBYOSYS when ENABLE_PYOSYS is set
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2020-03-19
Miodrag Milanovic
Add one mode dependency
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2020-03-14
Miodrag Milanovic
Fix invalid verilog syntax
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2020-03-13
Miodrag Milanovic
exclude clang from checking
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2020-03-13
Miodrag Milanovic
Add YS_ prefix to macros, add explanation and apply...
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2020-03-13
Miodrag Milanovic
Added back tests for logger
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2020-03-13
Miodrag Milanovic
Use boost xpressive for gcc 4.8
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2020-03-13
Miodrag Milanovic
remove include where not used
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2020-03-12
Miodrag Milanovic
Added filter-out for libyosys.so
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2020-03-12
Miodrag Milanovic
Revert "Clean up 'install' Makefile target"
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2020-03-12
Miodrag Milanovic
Revert "Improve ABC repository management in Makefile"
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2020-03-12
Miodrag Milanovic
Add mandatory wasm file to zip file as well
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2020-02-26
Miodrag Milanovic
Remove tests for now
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2020-02-23
Miodrag Milanovic
Add tests for logger pass
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2020-02-23
Miodrag Milanovic
Remove duplicate warning detection
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2020-02-23
Miodrag Milanovic
Fix line endings
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2020-02-22
Miodrag Milanovic
Update explanation for expect-no-warnings
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2020-02-22
Miodrag Milanovic
Handle expect no warnings together with expected
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2020-02-22
Miodrag Milanovic
Check other regex parameters
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2020-02-20
Miodrag Milanovic
check for regex errors
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2020-02-17
Miodrag Milanovic
Prevent double error message
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2020-02-17
Miodrag Milanovic
Option to expect no warnings
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2020-02-17
Miodrag Milanovic
Add to changelog
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2020-02-17
Miodrag Milanovic
No new error if already failing
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2020-02-15
Miodrag Milanovic
Remove executable flag from files
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2020-02-14
Miodrag Milanovic
remove whitespace
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2020-02-14
Miodrag Milanovic
Add expect option to logger command
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2020-02-13
Miodrag Milanovic
Add new logger pass
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2020-01-28
Miodrag Milanovic
Updated test to use assert-max
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2020-01-10
Miodrag Milanovic
this one is fine
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2020-01-10
Miodrag Milanovic
Fix tests
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2020-01-10
Miodrag Milanovic
remove whitespace
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2020-01-10
Miodrag Milanovic
Use CARRY4 for abc1 as well, preventing issues with...
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2020-01-10
Miodrag Milanovic
Export wire properties as well in EDIF
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2020-01-04
Miodrag Milanovic
Valid to have attribute starting with SB_CARRY.
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2020-01-01
Miodrag Milanovic
Added a test case
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2020-01-01
Miodrag Milanovic
take skip wire bits into account
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2019-12-28
Miodrag Milanovic
Fix new tests
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2019-12-28
Miodrag Milanovic
Merge remote-tracking branch 'origin/master' into iopad_default
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2019-12-28
Miodrag Milanovic
Make test without iopads
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2019-12-28
Miodrag Milanovic
Revert "Fix xilinx tests, when iopads are default"
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2019-12-25
Miodrag Milanovic
fixed invalid char
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2019-12-21
Miodrag Milanovic
Addressed review comments
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2019-12-21
Miodrag Milanovic
iopad no op for compatibility with old scripts
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2019-12-21
Miodrag Milanovic
Fix xilinx tests, when iopads are default
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2019-12-21
Miodrag Milanovic
Make iopad option default for all xilinx flows
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2019-12-07
Miodrag Milanovic
Fix for non-deterministic test
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2019-11-11
Miodrag Milanovic
Fixed tests
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2019-10-18
Miodrag Milanovic
fixed error
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2019-10-18
Miodrag Milanovic
Unify verilog style
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2019-10-18
Miodrag Milanovic
Common memory test now shared
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2019-10-18
Miodrag Milanovic
Remove not needed tests
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2019-10-18
Miodrag Milanovic
Share common tests
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2019-10-18
Miodrag Milanovic
fix yosys path
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2019-10-18
Miodrag Milanovic
Fix path to yosys
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2019-10-18
Miodrag Milanovic
Moved all tests in arch sub directory
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2019-10-18
Miodrag Milanovic
Add async2sync
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2019-10-18
Miodrag Milanovic
hierarchy - proc reorder
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2019-10-18
Miodrag Milanovic
hierarchy - proc reorder
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2019-10-18
Miodrag Milanovic
hierarchy - proc reorder
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2019-10-18
Miodrag Milanovic
hierarchy - proc reorder
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2019-10-17
Miodrag Milanovic
Make equivalence work with latest master
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2019-10-17
Miodrag Milanovic
remove not needed top module
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2019-10-17
Miodrag Milanovic
remove not needed top module
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2019-10-17
Miodrag Milanovic
split muxes synth per type
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2019-10-17
Miodrag Milanovic
Test dffs separetely
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2019-10-17
Miodrag Milanovic
Split latches into separete tests
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2019-10-17
Miodrag Milanovic
Fix formatting
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2019-10-17
Miodrag Milanovic
Clean verilog code from not used define block
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2019-10-17
Miodrag Milanovic
Removed alu and div_mod test as agreed, ignore generated...
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2019-10-17
Miodrag Milanovic
Test per flip-flop type
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2019-10-04
Miodrag Milanovic
Fixes for MSVC build
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2019-10-04
Miodrag Milanovic
FF should be initialized to 0
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2019-10-04
Miodrag Milanovic
Split mux tests per type
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2019-10-04
Miodrag Milanovic
Split latch check
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2019-10-04
Miodrag Milanovic
Add missing latch mapping
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2019-10-04
Miodrag Milanovic
split rest od ff's
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2019-10-04
Miodrag Milanovic
Separate check for ff's types
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2019-10-04
Miodrag Milanovic
Cleaned tests
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2019-10-04
Miodrag Milanovic
Remove not needed tests
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2019-10-04
Miodrag Milanovic
Merge branch 'SergeyDegtyar/efinix' of https://github...
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2019-10-04
Miodrag Milanovic
Cleanup and formating
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2019-10-04
Miodrag Milanovic
split latches into separate checks
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2019-10-04
Miodrag Milanovic
check muxes per type
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2019-10-04
Miodrag Milanovic
check ff's separately
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2019-10-04
Miodrag Milanovic
Cleanup top modules and not used defines
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2019-10-04
Miodrag Milanovic
remove alu test
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2019-10-04
Miodrag Milanovic
Merge branch 'SergeyDegtyar/anlogic' of https://github...
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2019-10-04
Miodrag Milanovic
Check latches type one by one
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2019-10-04
Miodrag Milanovic
Removed top module where not needed
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2019-10-04
Miodrag Milanovic
Test muxes synth one by one
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2019-10-04
Miodrag Milanovic
Cleaned verilog code from not used defines
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2019-10-04
Miodrag Milanovic
Check for MULT18X18D, since that is working now
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