Add coverage for single-core non-rtos OpenOCD.
[riscv-tests.git] / debug / targets / RISC-V /
drwxr-xr-x   ..
-rw-r--r-- 378 spike-rtos.cfg
-rw-r--r-- 366 spike.cfg
-rw-r--r-- 295 spike32-2.py
-rwxr-xr-x 719 spike32.lds
-rw-r--r-- 416 spike32.py
-rw-r--r-- 295 spike64-2.py
-rwxr-xr-x 580 spike64.lds
-rw-r--r-- 418 spike64.py