So many things happened since the last update they actually need to go in the main update, even in summary form. One big thing: Raptor Engineering sponsored us with remote access to a TALOS II Workstation! # Introduction Here's the summary (if it can be called a summary): * [An announcement](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-March/004995.html) that we got the funding (which is open to anyone - hint, hint) resulted in at least three people reaching out to join the team. "We don't need permission to own our own hardware" got a *really* positive reaction. * New team member, Jock (hello Jock!) starts on the coriolis2 layout, after Jean-Paul from LIP6.fr helped to dramatically improve how coriolis2 can be used. This resulted in a [tutorial](https://libre-riscv.org/HDL_workflow/coriolis2/) and a [huge bug report discussion](http://bugs.libre-riscv.org/show_bug.cgi?id=178) * Work has started on the [POWER ISA decoder](http://bugs.libre-riscv.org/show_bug.cgi?id=186), verified through [calling GNU AS](https://git.libre-riscv.org/?p=soc.git;a=blob;f=src/soc/decoder/test/test_decoder_gas.py;h=9238d3878d964907c5569a3468d6895effb7dc02;hb=56d145e42ac75626423915af22d1493f1e7bb143) (yes, really!) and on a mini-simulator [calling QEMU](https://git.libre-riscv.org/?p=soc.git;a=blob;f=src/soc/simulator/qemu.py;h=9eb103bae227e00a2a1d2ec4f43d7e39e4f44960;hb=56d145e42ac75626423915af22d1493f1e7bb143) for verification. * Jacob's simple-soft-float library growing [Power FP compatibility](http://bugs.libre-riscv.org/show_bug.cgi?id=258) and python bindings. * A Conference call with OpenPOWER Foundation Director, Hugh, and Timothy Pearson from RaptorCS has been established every two weeks. * The OpenPOWER Foundation is also running some open ["Virtual Coffee"](https://openpowerfoundation.org/openpower-virtual-coffee-calls/) weekly round-table calls for anyone interested, generally, in OpenPOWER development. * Tim sponsors our team with access to a Monster Talos II system with a whopping 128 GB RAM. htop lists a staggering 72 cores (18 real with 4-way hyperthreading). * [Epic MegaGrants](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-March/005262.html) reached out (hello!) to say they're still considering our request. * A marathon 3-hour session with [NLNet](http://nlnet.nl) resulted in the completion of the [Milestone tasks list(s)](http://bugs.libre-riscv.org/buglist.cgi?component=Milestones&list_id=567&resolution=---) and a [boat-load](http://lists.libre-riscv.org/pipermail/libre-riscv-dev/2020-March/thread.html) of bug reports to the list. * Immanuel Yehowshua is participating in the Georgia Tech [Create-X](https://create-x.gatech.edu/) Programme, and is establishing a Public Benefit Corporation in Atlanta, as an ethical vehicle for VC Funding. * A [Load/Store Buffer](http://bugs.libre-riscv.org/show_bug.cgi?id=216) design and [further discussion](http://bugs.libre-riscv.org/show_bug.cgi?id=257) including on [comp.arch](https://groups.google.com/forum/#!topic/comp.arch/cbGAlcCjiZE) inspired additional writeup on the [6600 scoreboard](https://libre-riscv.org/3d_gpu/architecture/6600scoreboard/) page. Well dang, as you can see, suddenly it just went ballistic. There's almost certainly things left off the list. For such a small team there's a heck of a lot going on. We have an awful lot to do, in a short amount of time: the 180nm tape-out is in October 2020 - only 7 months away. # NLNet Funding announcement TODO # Coriolis2 experimentation started TODO # POWER ISA decoder and Simulator TODO # simple-soft-float Library and POWER FP emulation The [simple-soft-float](https://salsa.debian.org/Kazan-team/simple-soft-float) library is a floating-point library Jacob wrote with the intention of being a reference implementation of IEEE 754 for hardware testing purposes. It's specifically designed to be written to be easier to understand instead of having the code obscured in pursuit of speed: * Being easier to understand helps prevent bugs where the code does not match the IEEE spec. * It uses the [algebraics](https://salsa.debian.org/Kazan-team/algebraics) library that Jacob wrote since that allows using numbers that behave like exact real numbers, making reasoning about the code simpler. * It is written in Rust rather than highly-macro-ified C, since that helps with readability since operations aren't obscured, as well as safety, since Rust proves at compile time that the code won't seg-fault unless you specifically opt-out of those guarantees by using `unsafe`. It currently supports 16, 32, 64, 128-bit FP for RISC-V, along with having a `DynamicFloat` type which allows dynamically specifying all aspects of how a particular floating-point type behaves -- if one wanted, they could configure it as a 2048-bit floating-point type. It also has Python bindings, thanks to the awesome [PyO3](https://pyo3.rs/) library for writing Python bindings in Rust. We decided to write simple-soft-float instead of extending the industry-standard [Berkeley softfloat](http://www.jhauser.us/arithmetic/SoftFloat.html) library because of a range of issues, including not supporting Power FP, requiring recompilation to switch which ISA is being emulated, not supporting all the required operations, architectural issues such as depending on global variables, etc. We are still testing simple-soft-float against Berkeley softfloat where we can, however, since Berkeley softfloat is widely used and highly likely to be correct. simple-soft-float is [gaining support for Power FP](http://bugs.libre-riscv.org/show_bug.cgi?id=258), which requires rewriting a lot of the status-flag handling code since Power supports a much larger set of floating-point status flags and exceptions than most other ISAs. Thanks to RaptorCS for giving us remote access to a Power9 system, since that makes it much easier verifying that the test cases are correct. API Docs for stable releases of both [simple-soft-float](https://docs.rs/simple-soft-float) and [algebraics](https://docs.rs/algebraics) are available on docs.rs. # OpenPOWER Conference calls TODO # OpenPower Virtual Coffee Meetings TODO # Sponsorship by RaptorCS with a TALOS II Workstation TODO # Epic Megagrants TODO # NLNet Milestone tasks TODO # Georgia Tech CREATE-X TODO # LOAD/STORE Buffer and 6600 design documentation TODO # Conclusion TODO