From d571ef24f82e43890aba0f74b4377f0cd7970793 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Tue, 28 May 2019 16:57:13 +0100 Subject: [PATCH] found good definition of transitive --- updates/018_2019may27_nlnet_grant_approved.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/updates/018_2019may27_nlnet_grant_approved.mdwn b/updates/018_2019may27_nlnet_grant_approved.mdwn index b15ae18..2acf847 100644 --- a/updates/018_2019may27_nlnet_grant_approved.mdwn +++ b/updates/018_2019may27_nlnet_grant_approved.mdwn @@ -108,7 +108,7 @@ family that AMD had to publish "Intel equivalent" speed numbers for, because it was so much more efficient and effective than Intel's designs) each instruction "accumulated" the dependencies of all prior instructions being issued in the same batch. This works because read and write -dependencies are *transitive* (Google it...) +dependencies are *transitive* (whenever a -> b and b -> c then a -> c). What that means, in practical terms, is that we have a way to create a design that could, if ramped up, take on the big boys. To make that -- 2.30.2