From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sat, 23 Jun 2018 18:45:49 +0000 (+0100)
Subject: update
X-Git-Tag: convert-csv-opcode-to-binary~5114
X-Git-Url: https://git.libre-soc.org/?p=libreriscv.git;a=commitdiff_plain;h=14205a7cbf791eefe13081be7889c9c9b501cfed

update
---

diff --git a/simple_v_extension/simple_v_chennai_2018.tex b/simple_v_extension/simple_v_chennai_2018.tex
index 62f312fe8..bc69edf9e 100644
--- a/simple_v_extension/simple_v_chennai_2018.tex
+++ b/simple_v_extension/simple_v_chennai_2018.tex
@@ -150,7 +150,7 @@
    \item Standard and future and custom opcodes now parallel\\
          (crucially: with NO extra instructions needing to be added)
   \end{itemize}
-  Note: EVERYTHING is parallelised:
+  Note: EVERY scalar op now paralleliseable
    \begin{itemize}
    \item All LOAD/STORE (inc. Compressed, Int/FP versions)
    \item All ALU ops (Int, FP, SIMD, DSP, everything)