From 8ed42e7221db297105e8c14a1f7ac2b37e501596 Mon Sep 17 00:00:00 2001 From: manili Date: Wed, 27 Jun 2018 18:31:58 +0100 Subject: [PATCH] --- shakti/m_class/libre_3d_gpu.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/shakti/m_class/libre_3d_gpu.mdwn b/shakti/m_class/libre_3d_gpu.mdwn index 4c0013820..479ec2fed 100644 --- a/shakti/m_class/libre_3d_gpu.mdwn +++ b/shakti/m_class/libre_3d_gpu.mdwn @@ -41,7 +41,7 @@ same silicon area). * Hardware (RTL) must be licensed under BSD or MIT with no "NON-COMMERCIAL" CLAUSES. * Any proposals will be competing against Vivante GC800 (using Etnaviv driver). -* The GPU is integrated (like Mali400). So all that the GPU needs to do is write to an area of memory (framebuffer or area of the framebuffer). The SoC - which in this case has a RISC-V core and has peripherals such as the LCD controller - will take care of the rest. +* The GPU is integrated (like Mali-400). So all that the GPU needs to do is write to an area of memory (framebuffer or area of the framebuffer). The SoC - which in this case has a RISC-V core and has peripherals such as the LCD controller - will take care of the rest. * In this arcitecture, the GPU, the CPU and the peripherals are all on the same AXI4 shared memory bus. They all have access to the same shared DDR3/DDR4 RAM. So as a result the GPU will use AXI4 to write directly to the framebuffer and the rest will be handle by SoC. * The job must be done by a team that shows sufficient expertise to reduce the risk. -- 2.30.2