cpu/vexriscv_smp: more coherent_dma to __init__ instead of add_memory_buses.
authorFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 7 Aug 2020 12:47:21 +0000 (14:47 +0200)
committerFlorent Kermarrec <florent@enjoy-digital.fr>
Fri, 7 Aug 2020 12:47:21 +0000 (14:47 +0200)
commit6f69679d21abe165febb5afd475a7de1f1aeafc5
tree32e45a3d5ed9281188a3309a43d9a6f92000eded
parentb3531cd2a879ff1ee84a03bf8e1b967951bd5094
cpu/vexriscv_smp: more coherent_dma to __init__ instead of add_memory_buses.

LiteX is creating the SoC.dma_bus just after the CPU is declared, so declaring it in add_memory_buses was preventing it.
It's also more coherent to move it to __init__ since not related to the memory_buses.
litex/soc/cores/cpu/vexriscv_smp/core.py