Add Tercel PHY reset synchronization
[microwatt.git] / core_debug.vhdl
2021-02-08 Michael NeulingMerge pull request #273 from antonblanchard/wishbone...
2021-02-08 Michael NeulingMerge pull request #267 from paulusmack/master
2021-01-15 Paul Mackerrascore_debug: Stop logging 256 cycles after trigger
2021-01-15 Paul Mackerrascore_debug: Add an address trigger to stop logging...
2020-06-30 Paul MackerrasMerge pull request #206 from Jbalkind/icachecleanup
2020-06-19 Michael NeulingMerge pull request #208 from paulusmack/faster
2020-06-16 Paul MackerrasMake LOG_LENGTH configurable per FPGA variant
2020-06-13 Paul MackerrasAdd core logging
2020-06-03 Paul MackerrasMerge pull request #168 from shenki/flash-arty
2020-05-19 Anton BlanchardMerge branch 'master' into litedram
2020-05-19 Anton BlanchardMerge pull request #176 from antonblanchard/console...
2020-05-19 Anton BlanchardMerge pull request #174 from antonblanchard/yosys-fixes
2020-05-18 Anton BlanchardMerge pull request #169 from paulusmack/mmu
2020-05-14 Paul MackerrasMerge branch 'mmu'
2020-05-08 Paul Mackerrasdebug: Provide a way to examine GPRs, fast SPRs and MSR
2019-10-10 Anton BlanchardMerge pull request #79 from deece/uart_address
2019-10-09 Anton BlanchardMerge pull request #83 from paulusmack/logical
2019-10-09 Anton BlanchardMerge pull request #81 from antonblanchard/logical
2019-10-09 Anton BlanchardMerge pull request #82 from antonblanchard/icache-set...
2019-10-08 Benjamin Herrenschmidtfetch/icache: Fit icache in BRAM
2019-09-24 Anton BlanchardMerge branch 'divider' of https://github.com/paulusmack...
2019-09-24 Anton BlanchardMerge pull request #69 from antonblanchard/debug-module
2019-09-20 Benjamin HerrenschmidtAdd core debug module