Add Tercel PHY reset synchronization
[microwatt.git] / dcache.vhdl
2021-02-08 Michael NeulingMerge pull request #269 from paulusmack/pipeline
2021-02-08 Michael NeulingMerge pull request #268 from paulusmack/btc
2021-02-08 Michael NeulingMerge pull request #273 from antonblanchard/wishbone...
2021-02-08 Michael NeulingMerge pull request #267 from paulusmack/master
2021-01-19 Paul Mackerrasdcache: Fix bugs in pipelined operation
2021-01-15 Paul Mackerrasloadstore1/dcache: Send store data one cycle later
2021-01-15 Paul Mackerrascore: Implement quadword loads and stores
2021-01-15 Paul Mackerrasdcache: Add more commentary, no code change
2020-08-07 Michael NeulingMerge pull request #229 from ozbenh/litedram
2020-07-22 Michael NeulingMerge pull request #233 from paulusmack/master
2020-07-20 Paul Mackerrasdcache: Ease timing on wishbone data and byte selects
2020-07-20 Paul Mackerrasdcache: Output separate done-without-error and error...
2020-07-20 Paul Mackerrasdcache: Ease timing on calculation of acks remaining
2020-07-20 Paul Mackerrasdcache: Improve timing of valid/done outputs
2020-07-14 Paul Mackerrascore: Don't generate logic for log data when LOG_LENGTH = 0
2020-07-14 Paul Mackerrasdcache: Remove dependency of r1.wb.adr/dat/sel on...
2020-07-14 Paul Mackerrasdcache: Update TLB PLRU one cycle later
2020-07-14 Paul Mackerrasdcache: Do PLRU update one cycle later
2020-06-30 Paul MackerrasMerge pull request #206 from Jbalkind/icachecleanup
2020-06-19 Michael NeulingMerge pull request #208 from paulusmack/faster
2020-06-13 Paul Mackerrasdcache: Reduce back-to-back store latency from 3 cycles...
2020-06-13 Paul Mackerrasdcache: Reduce latencies and improve timing
2020-06-13 Paul MackerrasAdd core logging
2020-06-05 Paul MackerrasMerge pull request #183 from shawnanastasio/addpcis
2020-06-04 Paul MackerrasMerge pull request #185 from ozbenh/misc
2020-06-03 Paul MackerrasMerge pull request #168 from shenki/flash-arty
2020-06-02 Benjamin Herrenschmidtdcache: Rework RAM wrapper to synthetize better on...
2020-05-19 Anton BlanchardMerge branch 'master' into litedram
2020-05-19 Anton BlanchardMerge pull request #176 from antonblanchard/console...
2020-05-19 Anton BlanchardMerge pull request #174 from antonblanchard/yosys-fixes
2020-05-18 Anton BlanchardMerge pull request #169 from paulusmack/mmu
2020-05-15 Paul Mackerrasdcache: Fix bug in store hit after dcbz case
2020-05-14 Paul MackerrasMerge branch 'mmu'
2020-05-08 Paul MackerrasImplement slbia as a dTLB/iTLB flush
2020-05-08 Paul MackerrasMMU: Remove software-loaded dTLB mode
2020-05-08 Paul MackerrasMMU: Refetch PTE on access fault
2020-05-08 Paul MackerrasMMU: Implement radix page table machinery
2020-05-08 Paul MackerrasAdd framework for implementing an MMU
2020-05-08 Paul MackerrasImplement access permission checks
2020-05-08 Paul MackerrasImplement data storage interrupts
2020-05-08 Paul Mackerrasdcache: Implement data TLB
2020-05-06 Anton BlanchardMerge pull request #166 from paulusmack/master
2020-05-06 Paul MackerrasMerge remote-tracking branch 'remotes/origin/master'
2020-05-06 Paul Mackerrasdcache: Don't assert on dcbz cache hit
2020-04-28 Paul Mackerrasdcache: Implement the dcbz instruction
2020-03-30 Anton BlanchardMerge pull request #153 from paulusmack/master
2020-03-28 Paul Mackerrasloadstore1: Move logic from dcache to loadstore1
2020-03-05 Paul Mackerrasdcache: Remove LOAD_UPDATE2 state
2020-03-04 Paul Mackerrasdcache: Trim one cycle from the load hit path
2020-02-27 Paul Mackerrasdcache: Implement load-reserve and store-conditional...
2020-02-26 Paul Mackerrasdcache: Add support for unaligned loads and stores
2020-02-21 Paul Mackerrasdcache: Fix obscure bug and minor cleanups
2019-12-09 Anton BlanchardMerge pull request #122 from paulusmack/benh-sprs
2019-12-07 Benjamin HerrenschmidtAdd basic XER support
2019-11-15 Anton BlanchardMerge pull request #118 from antonblanchard/bus-pipeline
2019-10-30 Benjamin HerrenschmidtMove log2/ispow2 to a utils package
2019-10-30 Benjamin Herrenschmidtdcache: Add wishbone pipelining support
2019-10-25 Anton BlanchardMerge pull request #115 from antonblanchard/reduce...
2019-10-25 Anton BlanchardMerge pull request #113 from mikey/exec-sim-remove
2019-10-25 Anton BlanchardMerge pull request #114 from antonblanchard/dcache
2019-10-23 Benjamin HerrenschmidtMake it possible to change wishbone address size
2019-10-23 Benjamin Herrenschmidticache & dcache: Fix store way variable
2019-10-23 Benjamin Herrenschmidtdcache: Cleanup (mostly cosmetic)
2019-10-23 Benjamin Herrenschmidtdcache: Introduce an extra cycle latency to make timing
2019-10-23 Benjamin Herrenschmidtdcache: Add a dcache