Add Tercel PHY reset synchronization
[microwatt.git] / loadstore1.vhdl
2021-02-08 Michael NeulingMerge pull request #274 from mikey/read-sprs
2021-02-08 Michael NeulingFix DAR/DSISR reading before they are written
2021-02-08 Michael NeulingMerge pull request #269 from paulusmack/pipeline
2021-02-08 Michael NeulingMerge pull request #268 from paulusmack/btc
2021-02-08 Michael NeulingMerge pull request #273 from antonblanchard/wishbone...
2021-02-08 Michael NeulingMerge pull request #267 from paulusmack/master
2021-01-19 Paul Mackerrascore: Allow multiple loadstore instructions to be in...
2021-01-19 Paul Mackerrasloadstore: Convert to 3-stage pipeline
2021-01-19 Paul Mackerrasdcache: Fix bugs in pipelined operation
2021-01-19 Paul Mackerrascore: Send FPU interrupts to writeback rather than...
2021-01-18 Paul Mackerrascore: Send loadstore1 interrupts to writeback rather...
2021-01-18 Paul Mackerrascore: Track GPR hazards using tags that propagate throu...
2021-01-18 Paul Mackerrascore: Crack update-form loads into two internal ops
2021-01-15 Paul Mackerrasdecode: Add a facility field to the instruction decode...
2021-01-15 Paul Mackerrasloadstore1/dcache: Send store data one cycle later
2021-01-15 Paul Mackerrascore: Implement quadword loads and stores
2021-01-15 Paul Mackerrasloadstore1: Improve timing of data path from cache...
2021-01-15 Paul Mackerrasloadstore1: Decide on load formatting controls a cycle...
2020-09-17 Michael NeulingMerge pull request #245 from paulusmack/fpu
2020-09-03 Paul Mackerrascore: Add support for single-precision FP loads and...
2020-09-03 Paul Mackerrascore: Add support for floating-point loads and stores
2020-08-27 Michael NeulingMerge pull request #239 from paulusmack/master
2020-08-22 Paul Mackerrasloadstore1: Generate alignment interrupts for unaligned...
2020-08-20 Paul Mackerrascore: Implement 32-bit mode
2020-08-20 Paul Mackerrascore: Implement big-endian mode
2020-08-07 Michael NeulingMerge pull request #229 from ozbenh/litedram
2020-07-22 Michael NeulingMerge pull request #233 from paulusmack/master
2020-07-20 Paul Mackerrasloadstore1: Better expression for store data formatting
2020-07-20 Paul Mackerrasloadstore1: Further tweaks to improve synthesis with...
2020-07-20 Paul Mackerrasloadstore1: Separate address calculation for MMU to...
2020-07-20 Paul Mackerrasloadstore1: Generate busy signal earlier
2020-07-20 Paul Mackerrasdcache: Output separate done-without-error and error...
2020-07-14 Paul Mackerrascore: Don't generate logic for log data when LOG_LENGTH = 0
2020-07-14 Paul Mackerrasloadstore1: Eliminate two_dwords variable
2020-06-30 Paul MackerrasMerge pull request #206 from Jbalkind/icachecleanup
2020-06-19 Michael NeulingMerge pull request #208 from paulusmack/faster
2020-06-13 Paul Mackerrasloadstore1: Reduce busy cycles
2020-06-13 Paul Mackerrasloadstore1: Complete mfspr/mtspr a cycle later
2020-06-13 Paul Mackerrascore: Use a busy signal rather than a stall
2020-06-13 Paul MackerrasAdd core logging
2020-06-03 Paul MackerrasMerge pull request #168 from shenki/flash-arty
2020-05-19 Anton BlanchardMerge branch 'master' into litedram
2020-05-19 Anton BlanchardMerge pull request #176 from antonblanchard/console...
2020-05-19 Anton BlanchardMerge pull request #174 from antonblanchard/yosys-fixes
2020-05-18 Anton BlanchardMerge pull request #169 from paulusmack/mmu
2020-05-14 Paul MackerrasMerge branch 'mmu'
2020-05-08 Paul MackerrasMMU: Implement reading of the process table
2020-05-08 Paul MackerrasImplement slbia as a dTLB/iTLB flush
2020-05-08 Paul MackerrasMMU: Do radix page table walks on iTLB misses
2020-05-08 Paul MackerrasAdd TLB to icache
2020-05-08 Paul MackerrasMMU: Refetch PTE on access fault
2020-05-08 Paul MackerrasMMU: Implement data segment interrupts
2020-05-08 Paul MackerrasMMU: Implement radix page table machinery
2020-05-08 Paul MackerrasAdd framework for implementing an MMU
2020-05-08 Paul MackerrasImplement access permission checks
2020-05-08 Paul MackerrasImplement data storage interrupts
2020-05-08 Paul Mackerrasdcache: Implement data TLB
2020-05-08 Paul MackerrasPass mtspr/mfspr to MMU-related SPRs down to loadstore1
2020-05-06 Anton BlanchardMerge pull request #166 from paulusmack/master
2020-05-06 Paul MackerrasMerge remote-tracking branch 'remotes/origin/master'
2020-04-28 Paul Mackerrasdcache: Implement the dcbz instruction
2020-04-28 Paul MackerrasPlumb insn_type through to loadstore1
2020-03-30 Anton BlanchardMerge pull request #153 from paulusmack/master
2020-03-30 Paul Mackerrasloadstore1: Add support for cache-inhibited load and...
2020-03-29 Paul Mackerrasloadstore1: Move load data formatting from writeback...
2020-03-28 Paul Mackerrasloadstore1: Move logic from dcache to loadstore1
2020-03-04 Paul Mackerrasdcache: Trim one cycle from the load hit path
2020-02-27 Paul Mackerrasdcache: Implement load-reserve and store-conditional...
2020-02-26 Paul Mackerrasdcache: Add support for unaligned loads and stores
2020-01-21 Anton BlanchardMerge pull request #134 from paulusmack/master
2020-01-14 Paul MackerrasPlumb loadstore1 input from execute1 not decode2
2019-12-09 Anton BlanchardMerge pull request #122 from paulusmack/benh-sprs
2019-12-07 Benjamin HerrenschmidtAdd basic XER support
2019-10-25 Anton BlanchardMerge pull request #113 from mikey/exec-sim-remove
2019-10-25 Anton BlanchardMerge pull request #114 from antonblanchard/dcache
2019-10-23 Benjamin Herrenschmidtdcache: Add a dcache
2019-09-19 Anton BlanchardMerge pull request #65 from antonblanchard/loadstore-opt
2019-09-19 Anton BlanchardReformat loadstore1
2019-09-16 Anton BlanchardMerge pull request #62 from antonblanchard/byte-reverse...
2019-09-16 Anton BlanchardMove byte reversal of stores to first cycle
2019-09-11 Anton BlanchardMerge pull request #47 from antonblanchard/if-fix
2019-09-11 Anton BlanchardMerge pull request #46 from antonblanchard/record-fix
2019-09-11 Anton BlanchardMerge pull request #45 from antonblanchard/fixes
2019-09-11 Anton BlanchardFix issue in loadstore1
2019-09-11 Anton BlanchardMerge pull request #41 from mikey/travis
2019-09-11 Anton BlanchardMerge pull request #42 from antonblanchard/fetch-rework-v2
2019-09-11 Anton BlanchardRegister outputs on loadstore1
2019-09-11 Anton BlanchardMove debug execute output into decode2
2019-09-09 Anton BlanchardMerge pull request #29 from antonblanchard/no-second...
2019-09-09 Anton BlanchardMerge pull request #28 from antonblanchard/loadstore...
2019-09-09 Anton BlanchardRemove some more loadstore debug
2019-08-22 Anton BlanchardInitial import of microwatt