def pinspec():
pinbanks = {
- 'A': 28,
+ 'A': (28, 4),
+ 'B': (18, 4),
+ 'C': (24, 1),
+ 'D': (92, 1),
}
fixedpins = {
'CTRL_SYS': [
'ULPI2': 'ULPI (USB Low Pin-count) 2',
}
- ps = PinSpec(pinbanks, fixedpins, function_names)
+ ps = PinSpec(pinbanks, fixedpins, function_names,
+ ['lcd', 'jtag', 'fb'])
# Bank A, 0-27
ps.gpio("", ('A', 0), 0, 0, 28)
ps.uart("1", ('A', 2), 2)
ps.uart("2", ('A', 14), 2)
+ # see comment in spec.interfaces.PinGen, this is complicated.
+ flexspec = {
+ #'FB_TS': ('FB_ALE', 2), # commented out for now
+ 'FB_CS2': ('FB_BWE2', 2),
+ 'FB_AD0': ('FB_BWE2', 3),
+ 'FB_CS3': ('FB_BWE3', 2),
+ 'FB_AD1': ('FB_BWE3', 3),
+ 'FB_TBST': ('FB_OE', 2),
+ 'FB_TSIZ0': ('FB_BWE0', 2),
+ 'FB_TSIZ1': ('FB_BWE1', 2),
+ }
+ ps.gpio("", ('B', 0), 0, 0, 18)
+ ps.flexbus1("", ('B', 0), 1, spec=flexspec)
+
+ ps.flexbus2("", ('C', 0), 0)
+
+ ps.sdram1("", ('D', 0), 0)
+ ps.sdram3("", ('D', 35), 0)
+
# Scenarios below can be spec'd out as either "find first interface"
# by name/number e.g. SPI1, or as "find in bank/mux" which must be
# spec'd as "BM:Name" where B is bank (A-F), M is Mux (0-3)
# lists (interfaces, EINTs, PWMs) from available pins.
i_class = ['ULPI0/8', 'ULPI1', 'MMC', 'SD0', 'UART0',
- 'TWI0', 'MSPI0', 'B3:SD1', ]
+ 'TWI0', 'MSPI0', 'B3:SD1', ]
i_class_eint = ['EINT_0', 'EINT_1', 'EINT_2', 'EINT_3', 'EINT_4']
i_class_pwm = ['B2:PWM_0']
descriptions = {