X-Git-Url: https://git.libre-soc.org/?p=pinmux.git;a=blobdiff_plain;f=src%2Fbsv%2Fpinmux_generator.py;h=64ab8851b071b8fc8bb64a945056d1fd96f4f2f0;hp=79bfc0a038140a6f33b52a589a47696d4e303a92;hb=0e07cd1c35e098cac02d0278ed18f1e3d8090352;hpb=0179d35e50fdba6b9a0c9bb3a77dfea16773d3e0 diff --git a/src/bsv/pinmux_generator.py b/src/bsv/pinmux_generator.py index 79bfc0a..64ab885 100644 --- a/src/bsv/pinmux_generator.py +++ b/src/bsv/pinmux_generator.py @@ -202,7 +202,10 @@ def write_pmp(pmp, p, ifaces, iocells): for cell in p.muxed_cells: cellnum = cell[0] - cell_bit_width = bwid_template % p.get_muxwidth(cellnum) + bitwidth = p.get_muxbitwidth(cellnum) + if bitwidth == 0: + continue + cell_bit_width = bwid_template % bitwidth bsv_file.write(mux_interface.ifacefmt(cellnum, cell_bit_width)) bsv_file.write("\n endinterface\n") @@ -275,8 +278,12 @@ def write_pmp(pmp, p, ifaces, iocells): // values for each mux assigned to a CELL ''') for cell in p.muxed_cells: - bsv_file.write(mux_interface.wirefmt( - cell[0], cell_bit_width)) + cellnum = cell[0] + bitwidth = p.get_muxbitwidth(cellnum) + if bitwidth == 0: + continue + cell_bit_width = bwid_template % bitwidth + bsv_file.write(mux_interface.wirefmt(cellnum, cell_bit_width)) iocells.wirefmt(bsv_file) ifaces.wirefmt(bsv_file) @@ -298,9 +305,14 @@ def write_pmp(pmp, p, ifaces, iocells): interface mux_lines = interface MuxSelectionLines ''') for cell in p.muxed_cells: + cellnum = cell[0] + bitwidth = p.get_muxbitwidth(cellnum) + if bitwidth == 0: + continue + cell_bit_width = bwid_template % bitwidth bsv_file.write( mux_interface.ifacedef( - cell[0], cell_bit_width)) + cellnum, cell_bit_width)) bsv_file.write("\n endinterface;") bsv_file.write('''