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(parent: f7743b1) | patch
add a core-mgr *and* a pad-mgr to JTAG class so that an *entire* set
authorLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 28 Nov 2021 15:02:16 +0000 (15:02 +0000)
committerLuke Kenneth Casson Leighton <lkcl@lkcl.net>
Sun, 28 Nov 2021 15:02:16 +0000 (15:02 +0000)
commit8904999e9d901a79d514dc39386daf7168e493c2
tree87e29a9361769b9e413eb444e15942dec1acac65tree
parentf7743b10d2875acedf428db411db6f135fb5dfb4commit | diff
add a core-mgr *and* a pad-mgr to JTAG class so that an *entire* set
of "resources" is connected inside the module... *outside* of the Platform.
the Platform then only needs a straight port-to-port connection *NOT*
"the Platform connects up JTAG Boundary Scan"
src/spec/testing_stage1.py diff | blob | history
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